1848 lines
56 KiB
Plaintext
1848 lines
56 KiB
Plaintext
//
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// Generated by NVIDIA NVVM Compiler
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//
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// Compiler Build ID: CL-23083092
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// Cuda compilation tools, release 9.1, V9.1.85
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// Based on LLVM 3.4svn
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//
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.version 6.1
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.target sm_30
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.address_size 64
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// .globl _Z6oxMainv
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.global .align 8 .b8 pixelID[8];
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.global .align 8 .b8 resolution[8];
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.global .align 4 .b8 normal[12];
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.global .align 4 .b8 camPos[12];
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.global .align 4 .b8 root[4];
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.global .align 4 .u32 imageEnabled;
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.global .texref lightmap;
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.global .align 16 .b8 tileInfo[16];
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.global .align 4 .u32 additive;
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.global .align 1 .b8 image[1];
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.global .align 1 .b8 image_HDR[1];
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.global .align 1 .b8 image_HDR2[1];
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.global .align 1 .b8 image_Mask[1];
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.global .align 1 .b8 image_Dir[1];
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.global .align 1 .b8 uvpos[1];
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.global .align 1 .b8 uvnormal[1];
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.global .align 4 .u32 ignoreNormal;
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.global .align 1 .b8 localLights[1];
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.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo12ignoreNormalE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
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.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename12ignoreNormalE[4] = {105, 110, 116, 0};
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.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum12ignoreNormalE = 4919;
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.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
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.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
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.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
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.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic12ignoreNormalE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation12ignoreNormalE[1];
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.visible .entry _Z6oxMainv(
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)
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{
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.local .align 4 .b8 __local_depot0[4];
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.reg .b64 %SP;
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.reg .b64 %SPL;
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.reg .pred %p<132>;
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.reg .b16 %rs<59>;
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.reg .f32 %f<1206>;
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.reg .b32 %r<199>;
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.reg .b64 %rd<126>;
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mov.u64 %rd125, __local_depot0;
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cvta.local.u64 %SP, %rd125;
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ld.global.v2.u32 {%r29, %r30}, [pixelID];
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cvt.u64.u32 %rd10, %r29;
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cvt.u64.u32 %rd11, %r30;
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mov.u64 %rd14, uvnormal;
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cvta.global.u64 %rd9, %rd14;
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mov.u32 %r27, 2;
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mov.u32 %r28, 4;
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mov.u64 %rd13, 0;
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// inline asm
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call (%rd8), _rt_buffer_get_64, (%rd9, %r27, %r28, %rd10, %rd11, %rd13, %rd13);
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// inline asm
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ld.u32 %r1, [%rd8];
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shr.u32 %r33, %r1, 16;
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cvt.u16.u32 %rs1, %r33;
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and.b16 %rs3, %rs1, 255;
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cvt.u16.u32 %rs4, %r1;
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or.b16 %rs5, %rs4, %rs3;
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setp.eq.s16 %p8, %rs5, 0;
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mov.f32 %f1148, 0f00000000;
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mov.f32 %f1149, %f1148;
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mov.f32 %f1150, %f1148;
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@%p8 bra BB0_2;
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ld.u8 %rs6, [%rd8+1];
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and.b16 %rs8, %rs4, 255;
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cvt.rn.f32.u16 %f203, %rs8;
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div.rn.f32 %f204, %f203, 0f437F0000;
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fma.rn.f32 %f205, %f204, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f206, %rs6;
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div.rn.f32 %f207, %f206, 0f437F0000;
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fma.rn.f32 %f208, %f207, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f209, %rs3;
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div.rn.f32 %f210, %f209, 0f437F0000;
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fma.rn.f32 %f211, %f210, 0f40000000, 0fBF800000;
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mul.f32 %f212, %f208, %f208;
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fma.rn.f32 %f213, %f205, %f205, %f212;
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fma.rn.f32 %f214, %f211, %f211, %f213;
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sqrt.rn.f32 %f215, %f214;
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rcp.rn.f32 %f216, %f215;
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mul.f32 %f1148, %f205, %f216;
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mul.f32 %f1149, %f208, %f216;
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mul.f32 %f1150, %f211, %f216;
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BB0_2:
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ld.global.v2.u32 {%r34, %r35}, [pixelID];
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ld.global.v2.u32 {%r37, %r38}, [tileInfo];
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add.s32 %r2, %r34, %r37;
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add.s32 %r3, %r35, %r38;
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setp.eq.f32 %p9, %f1149, 0f00000000;
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setp.eq.f32 %p10, %f1148, 0f00000000;
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and.pred %p11, %p10, %p9;
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setp.eq.f32 %p12, %f1150, 0f00000000;
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and.pred %p13, %p11, %p12;
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@%p13 bra BB0_96;
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bra.uni BB0_3;
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BB0_96:
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ld.global.u32 %r198, [imageEnabled];
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and.b32 %r173, %r198, 1;
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setp.eq.b32 %p126, %r173, 1;
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@!%p126 bra BB0_98;
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bra.uni BB0_97;
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BB0_97:
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cvt.u64.u32 %rd86, %r2;
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cvt.u64.u32 %rd87, %r3;
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mov.u64 %rd90, image;
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cvta.global.u64 %rd85, %rd90;
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// inline asm
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call (%rd84), _rt_buffer_get_64, (%rd85, %r27, %r28, %rd86, %rd87, %rd13, %rd13);
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// inline asm
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mov.u16 %rs40, 0;
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st.v4.u8 [%rd84], {%rs40, %rs40, %rs40, %rs40};
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ld.global.u32 %r198, [imageEnabled];
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BB0_98:
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and.b32 %r176, %r198, 8;
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setp.eq.s32 %p127, %r176, 0;
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@%p127 bra BB0_100;
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cvt.u64.u32 %rd93, %r2;
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cvt.u64.u32 %rd94, %r3;
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mov.u64 %rd97, image_Mask;
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cvta.global.u64 %rd92, %rd97;
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// inline asm
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call (%rd91), _rt_buffer_get_64, (%rd92, %r27, %r27, %rd93, %rd94, %rd13, %rd13);
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// inline asm
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mov.f32 %f1140, 0f00000000;
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cvt.rzi.u32.f32 %r179, %f1140;
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cvt.u16.u32 %rs41, %r179;
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mov.u16 %rs42, 0;
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st.v2.u8 [%rd91], {%rs41, %rs42};
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ld.global.u32 %r198, [imageEnabled];
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BB0_100:
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and.b32 %r180, %r198, 4;
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setp.eq.s32 %p128, %r180, 0;
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@%p128 bra BB0_104;
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ld.global.u32 %r181, [additive];
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setp.eq.s32 %p129, %r181, 0;
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cvt.u64.u32 %rd6, %r2;
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cvt.u64.u32 %rd7, %r3;
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@%p129 bra BB0_103;
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mov.u64 %rd110, image_HDR;
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cvta.global.u64 %rd99, %rd110;
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mov.u32 %r185, 8;
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// inline asm
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call (%rd98), _rt_buffer_get_64, (%rd99, %r27, %r185, %rd6, %rd7, %rd13, %rd13);
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// inline asm
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ld.v4.u16 {%rs49, %rs50, %rs51, %rs52}, [%rd98];
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// inline asm
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{ cvt.f32.f16 %f1141, %rs49;}
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// inline asm
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// inline asm
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{ cvt.f32.f16 %f1142, %rs50;}
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// inline asm
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// inline asm
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{ cvt.f32.f16 %f1143, %rs51;}
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// inline asm
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// inline asm
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call (%rd104), _rt_buffer_get_64, (%rd99, %r27, %r185, %rd6, %rd7, %rd13, %rd13);
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// inline asm
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add.f32 %f1144, %f1141, 0f00000000;
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add.f32 %f1145, %f1142, 0f00000000;
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add.f32 %f1146, %f1143, 0f00000000;
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// inline asm
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{ cvt.rn.f16.f32 %rs48, %f1146;}
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// inline asm
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// inline asm
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{ cvt.rn.f16.f32 %rs47, %f1145;}
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// inline asm
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// inline asm
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{ cvt.rn.f16.f32 %rs46, %f1144;}
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// inline asm
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mov.u16 %rs53, 0;
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st.v4.u16 [%rd104], {%rs46, %rs47, %rs48, %rs53};
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bra.uni BB0_104;
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BB0_3:
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ld.global.v2.u32 {%r46, %r47}, [pixelID];
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cvt.u64.u32 %rd17, %r46;
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cvt.u64.u32 %rd18, %r47;
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mov.u64 %rd26, uvpos;
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cvta.global.u64 %rd16, %rd26;
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mov.u32 %r43, 12;
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// inline asm
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call (%rd15), _rt_buffer_get_64, (%rd16, %r27, %r43, %rd17, %rd18, %rd13, %rd13);
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// inline asm
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ld.f32 %f9, [%rd15+8];
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ld.f32 %f8, [%rd15+4];
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ld.f32 %f7, [%rd15];
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mul.f32 %f224, %f7, 0f3456BF95;
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mul.f32 %f225, %f8, 0f3456BF95;
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mul.f32 %f226, %f9, 0f3456BF95;
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abs.f32 %f227, %f1148;
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div.rn.f32 %f228, %f224, %f227;
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abs.f32 %f229, %f1149;
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div.rn.f32 %f230, %f225, %f229;
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abs.f32 %f231, %f1150;
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div.rn.f32 %f232, %f226, %f231;
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abs.f32 %f233, %f228;
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abs.f32 %f234, %f230;
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abs.f32 %f235, %f232;
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mov.f32 %f236, 0f38D1B717;
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max.f32 %f237, %f233, %f236;
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max.f32 %f238, %f234, %f236;
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max.f32 %f239, %f235, %f236;
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fma.rn.f32 %f10, %f1148, %f237, %f7;
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fma.rn.f32 %f11, %f1149, %f238, %f8;
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fma.rn.f32 %f12, %f1150, %f239, %f9;
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mov.u64 %rd27, localLights;
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cvta.global.u64 %rd25, %rd27;
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mov.u32 %r44, 1;
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mov.u32 %r45, 96;
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// inline asm
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call (%rd21, %rd22, %rd23, %rd24), _rt_buffer_get_size_64, (%rd25, %r44, %r45);
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// inline asm
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cvt.u32.u64 %r4, %rd21;
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setp.eq.s32 %p14, %r4, 0;
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mov.f32 %f1151, 0f00000000;
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mov.f32 %f18, %f1151;
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mov.f32 %f19, %f1151;
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mov.f32 %f20, %f1151;
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mov.f32 %f1155, %f1151;
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mov.f32 %f1156, %f1151;
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mov.f32 %f1157, %f1151;
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@%p14 bra BB0_42;
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mov.f32 %f247, 0f40000000;
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cvt.rzi.f32.f32 %f248, %f247;
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add.f32 %f249, %f248, %f248;
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mov.f32 %f250, 0f40800000;
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sub.f32 %f251, %f250, %f249;
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abs.f32 %f13, %f251;
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mul.f32 %f14, %f10, 0f3456BF95;
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mul.f32 %f15, %f11, 0f3456BF95;
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mul.f32 %f16, %f12, 0f3456BF95;
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mov.f32 %f246, 0f00000000;
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mov.u32 %r190, 0;
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abs.f32 %f428, %f14;
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abs.f32 %f429, %f15;
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max.f32 %f430, %f428, %f429;
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abs.f32 %f431, %f16;
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max.f32 %f432, %f430, %f431;
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mov.f32 %f1151, %f246;
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mov.f32 %f18, %f246;
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mov.f32 %f19, %f246;
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mov.f32 %f20, %f246;
|
|
mov.f32 %f1155, %f246;
|
|
mov.f32 %f1156, %f246;
|
|
mov.f32 %f1157, %f246;
|
|
|
|
BB0_5:
|
|
cvt.u64.u32 %rd30, %r190;
|
|
// inline asm
|
|
call (%rd28), _rt_buffer_get_64, (%rd25, %r44, %r45, %rd30, %rd13, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.f32 {%f254, %f255, %f256, %f257}, [%rd28+80];
|
|
ld.v4.f32 {%f258, %f259, %f260, %f261}, [%rd28+64];
|
|
ld.v4.f32 {%f262, %f263, %f264, %f265}, [%rd28+48];
|
|
ld.v4.f32 {%f1161, %f1162, %f1163, %f269}, [%rd28+32];
|
|
ld.v4.f32 {%f270, %f271, %f272, %f273}, [%rd28+16];
|
|
ld.v4.f32 {%f274, %f275, %f276, %f277}, [%rd28];
|
|
mov.b32 %r6, %f257;
|
|
sub.f32 %f279, %f275, %f7;
|
|
sub.f32 %f280, %f276, %f8;
|
|
sub.f32 %f281, %f277, %f9;
|
|
mul.f32 %f282, %f280, %f280;
|
|
fma.rn.f32 %f283, %f279, %f279, %f282;
|
|
fma.rn.f32 %f284, %f281, %f281, %f283;
|
|
sqrt.rn.f32 %f50, %f284;
|
|
rcp.rn.f32 %f285, %f50;
|
|
mul.f32 %f51, %f279, %f285;
|
|
mul.f32 %f52, %f280, %f285;
|
|
mul.f32 %f53, %f281, %f285;
|
|
mul.f32 %f54, %f50, %f273;
|
|
abs.f32 %f55, %f54;
|
|
setp.lt.f32 %p15, %f55, 0f00800000;
|
|
mul.f32 %f286, %f55, 0f4B800000;
|
|
selp.f32 %f287, 0fC3170000, 0fC2FE0000, %p15;
|
|
selp.f32 %f288, %f286, %f55, %p15;
|
|
mov.b32 %r53, %f288;
|
|
and.b32 %r54, %r53, 8388607;
|
|
or.b32 %r55, %r54, 1065353216;
|
|
mov.b32 %f289, %r55;
|
|
shr.u32 %r56, %r53, 23;
|
|
cvt.rn.f32.u32 %f290, %r56;
|
|
add.f32 %f291, %f287, %f290;
|
|
setp.gt.f32 %p16, %f289, 0f3FB504F3;
|
|
mul.f32 %f292, %f289, 0f3F000000;
|
|
add.f32 %f293, %f291, 0f3F800000;
|
|
selp.f32 %f294, %f292, %f289, %p16;
|
|
selp.f32 %f295, %f293, %f291, %p16;
|
|
add.f32 %f296, %f294, 0fBF800000;
|
|
add.f32 %f253, %f294, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f252,%f253;
|
|
// inline asm
|
|
add.f32 %f297, %f296, %f296;
|
|
mul.f32 %f298, %f252, %f297;
|
|
mul.f32 %f299, %f298, %f298;
|
|
mov.f32 %f300, 0f3C4CAF63;
|
|
mov.f32 %f301, 0f3B18F0FE;
|
|
fma.rn.f32 %f302, %f301, %f299, %f300;
|
|
mov.f32 %f303, 0f3DAAAABD;
|
|
fma.rn.f32 %f304, %f302, %f299, %f303;
|
|
mul.rn.f32 %f305, %f304, %f299;
|
|
mul.rn.f32 %f306, %f305, %f298;
|
|
sub.f32 %f307, %f296, %f298;
|
|
neg.f32 %f308, %f298;
|
|
add.f32 %f309, %f307, %f307;
|
|
fma.rn.f32 %f310, %f308, %f296, %f309;
|
|
mul.rn.f32 %f311, %f252, %f310;
|
|
add.f32 %f312, %f306, %f298;
|
|
sub.f32 %f313, %f298, %f312;
|
|
add.f32 %f314, %f306, %f313;
|
|
add.f32 %f315, %f311, %f314;
|
|
add.f32 %f316, %f312, %f315;
|
|
sub.f32 %f317, %f312, %f316;
|
|
add.f32 %f318, %f315, %f317;
|
|
mov.f32 %f319, 0f3F317200;
|
|
mul.rn.f32 %f320, %f295, %f319;
|
|
mov.f32 %f321, 0f35BFBE8E;
|
|
mul.rn.f32 %f322, %f295, %f321;
|
|
add.f32 %f323, %f320, %f316;
|
|
sub.f32 %f324, %f320, %f323;
|
|
add.f32 %f325, %f316, %f324;
|
|
add.f32 %f326, %f318, %f325;
|
|
add.f32 %f327, %f322, %f326;
|
|
add.f32 %f328, %f323, %f327;
|
|
sub.f32 %f329, %f323, %f328;
|
|
add.f32 %f330, %f327, %f329;
|
|
mul.rn.f32 %f56, %f250, %f328;
|
|
neg.f32 %f332, %f56;
|
|
fma.rn.f32 %f333, %f250, %f328, %f332;
|
|
fma.rn.f32 %f334, %f250, %f330, %f333;
|
|
fma.rn.f32 %f57, %f246, %f328, %f334;
|
|
add.rn.f32 %f58, %f56, %f57;
|
|
mov.b32 %r57, %f58;
|
|
setp.eq.s32 %p1, %r57, 1118925336;
|
|
add.s32 %r58, %r57, -1;
|
|
mov.b32 %f336, %r58;
|
|
selp.f32 %f337, %f336, %f58, %p1;
|
|
mul.f32 %f338, %f337, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f339, %f338;
|
|
mov.f32 %f340, 0fBF317200;
|
|
fma.rn.f32 %f341, %f339, %f340, %f337;
|
|
mov.f32 %f342, 0fB5BFBE8E;
|
|
fma.rn.f32 %f343, %f339, %f342, %f341;
|
|
mul.f32 %f344, %f343, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f345, %f344;
|
|
add.f32 %f346, %f339, 0f00000000;
|
|
ex2.approx.f32 %f347, %f346;
|
|
mul.f32 %f348, %f345, %f347;
|
|
setp.lt.f32 %p17, %f337, 0fC2D20000;
|
|
selp.f32 %f349, 0f00000000, %f348, %p17;
|
|
setp.gt.f32 %p18, %f337, 0f42D20000;
|
|
selp.f32 %f1158, 0f7F800000, %f349, %p18;
|
|
setp.eq.f32 %p19, %f1158, 0f7F800000;
|
|
@%p19 bra BB0_7;
|
|
|
|
neg.f32 %f350, %f58;
|
|
add.rn.f32 %f351, %f56, %f350;
|
|
add.rn.f32 %f352, %f351, %f57;
|
|
add.f32 %f353, %f352, 0f37000000;
|
|
selp.f32 %f354, %f353, %f352, %p1;
|
|
fma.rn.f32 %f1158, %f1158, %f354, %f1158;
|
|
|
|
BB0_7:
|
|
setp.lt.f32 %p20, %f54, 0f00000000;
|
|
setp.eq.f32 %p21, %f13, 0f3F800000;
|
|
and.pred %p2, %p20, %p21;
|
|
mov.b32 %r59, %f1158;
|
|
xor.b32 %r60, %r59, -2147483648;
|
|
mov.b32 %f355, %r60;
|
|
selp.f32 %f1160, %f355, %f1158, %p2;
|
|
setp.eq.f32 %p22, %f54, 0f00000000;
|
|
@%p22 bra BB0_10;
|
|
bra.uni BB0_8;
|
|
|
|
BB0_10:
|
|
add.f32 %f358, %f54, %f54;
|
|
selp.f32 %f1160, %f358, 0f00000000, %p21;
|
|
bra.uni BB0_11;
|
|
|
|
BB0_8:
|
|
setp.geu.f32 %p23, %f54, 0f00000000;
|
|
@%p23 bra BB0_11;
|
|
|
|
cvt.rzi.f32.f32 %f357, %f250;
|
|
setp.neu.f32 %p24, %f357, 0f40800000;
|
|
selp.f32 %f1160, 0f7FFFFFFF, %f1160, %p24;
|
|
|
|
BB0_11:
|
|
add.f32 %f359, %f55, 0f40800000;
|
|
mov.b32 %r61, %f359;
|
|
setp.lt.s32 %p26, %r61, 2139095040;
|
|
@%p26 bra BB0_16;
|
|
|
|
setp.gtu.f32 %p27, %f55, 0f7F800000;
|
|
@%p27 bra BB0_15;
|
|
bra.uni BB0_13;
|
|
|
|
BB0_15:
|
|
add.f32 %f1160, %f54, 0f40800000;
|
|
bra.uni BB0_16;
|
|
|
|
BB0_13:
|
|
setp.neu.f32 %p28, %f55, 0f7F800000;
|
|
@%p28 bra BB0_16;
|
|
|
|
selp.f32 %f1160, 0fFF800000, 0f7F800000, %p2;
|
|
|
|
BB0_16:
|
|
mul.f32 %f360, %f50, %f271;
|
|
mov.f32 %f1176, 0f3F800000;
|
|
sub.f32 %f362, %f1176, %f1160;
|
|
setp.eq.f32 %p29, %f54, 0f3F800000;
|
|
selp.f32 %f363, 0f00000000, %f362, %p29;
|
|
cvt.sat.f32.f32 %f364, %f363;
|
|
fma.rn.f32 %f365, %f360, %f360, %f272;
|
|
div.rn.f32 %f1164, %f364, %f365;
|
|
mul.f32 %f366, %f1149, %f52;
|
|
fma.rn.f32 %f367, %f1148, %f51, %f366;
|
|
fma.rn.f32 %f368, %f1150, %f53, %f367;
|
|
ld.global.u32 %r62, [ignoreNormal];
|
|
setp.eq.s32 %p30, %r62, 0;
|
|
selp.f32 %f369, %f368, 0f3F800000, %p30;
|
|
cvt.sat.f32.f32 %f85, %f369;
|
|
setp.eq.f32 %p31, %f274, 0f3F800000;
|
|
@%p31 bra BB0_22;
|
|
bra.uni BB0_17;
|
|
|
|
BB0_22:
|
|
setp.leu.f32 %p35, %f269, 0f00000000;
|
|
@%p35 bra BB0_24;
|
|
|
|
mul.f32 %f400, %f254, %f51;
|
|
mul.f32 %f401, %f255, %f52;
|
|
neg.f32 %f402, %f401;
|
|
sub.f32 %f403, %f402, %f400;
|
|
mul.f32 %f404, %f256, %f53;
|
|
sub.f32 %f405, %f403, %f404;
|
|
setp.gt.f32 %p36, %f405, 0f00000000;
|
|
selp.f32 %f406, 0f3F800000, 0f00000000, %p36;
|
|
mul.f32 %f407, %f263, %f52;
|
|
fma.rn.f32 %f408, %f262, %f51, %f407;
|
|
mul.f32 %f409, %f259, %f52;
|
|
fma.rn.f32 %f410, %f258, %f51, %f409;
|
|
fma.rn.f32 %f411, %f264, %f53, %f408;
|
|
fma.rn.f32 %f412, %f260, %f53, %f410;
|
|
fma.rn.f32 %f396, %f265, %f411, 0f3F000000;
|
|
fma.rn.f32 %f397, %f265, %f412, 0f3F000000;
|
|
cvt.rzi.s32.f32 %r66, %f269;
|
|
mov.f32 %f399, 0f00000000;
|
|
// inline asm
|
|
call (%f392, %f393, %f394, %f395), _rt_texture_get_f_id, (%r66, %r27, %f396, %f397, %f399, %f399);
|
|
// inline asm
|
|
mul.f32 %f413, %f406, %f392;
|
|
mul.f32 %f414, %f406, %f393;
|
|
mul.f32 %f415, %f406, %f394;
|
|
mul.f32 %f1161, %f1161, %f413;
|
|
mul.f32 %f1162, %f1162, %f414;
|
|
mul.f32 %f1163, %f1163, %f415;
|
|
bra.uni BB0_24;
|
|
|
|
BB0_17:
|
|
setp.eq.f32 %p32, %f274, 0f40000000;
|
|
@%p32 bra BB0_20;
|
|
bra.uni BB0_18;
|
|
|
|
BB0_20:
|
|
setp.leu.f32 %p34, %f269, 0f00000000;
|
|
@%p34 bra BB0_24;
|
|
|
|
mul.f32 %f386, %f263, %f52;
|
|
fma.rn.f32 %f387, %f262, %f51, %f386;
|
|
mul.f32 %f388, %f259, %f52;
|
|
fma.rn.f32 %f389, %f258, %f51, %f388;
|
|
mul.f32 %f390, %f255, %f52;
|
|
fma.rn.f32 %f391, %f254, %f51, %f390;
|
|
fma.rn.f32 %f383, %f264, %f53, %f387;
|
|
fma.rn.f32 %f384, %f260, %f53, %f389;
|
|
fma.rn.f32 %f385, %f256, %f53, %f391;
|
|
cvt.rzi.s32.f32 %r63, %f269;
|
|
mov.u32 %r64, 6;
|
|
mov.u32 %r65, 0;
|
|
// inline asm
|
|
call (%f379, %f380, %f381, %f382), _rt_texture_get_base_id, (%r63, %r64, %f383, %f384, %f385, %r65);
|
|
// inline asm
|
|
mul.f32 %f1161, %f1161, %f379;
|
|
mul.f32 %f1162, %f1162, %f380;
|
|
mul.f32 %f1163, %f1163, %f381;
|
|
bra.uni BB0_24;
|
|
|
|
BB0_18:
|
|
setp.neu.f32 %p33, %f274, 0f40800000;
|
|
@%p33 bra BB0_24;
|
|
|
|
mul.f32 %f370, %f254, %f51;
|
|
mul.f32 %f371, %f255, %f52;
|
|
neg.f32 %f372, %f371;
|
|
sub.f32 %f373, %f372, %f370;
|
|
mul.f32 %f374, %f256, %f53;
|
|
sub.f32 %f375, %f373, %f374;
|
|
fma.rn.f32 %f376, %f269, %f375, %f265;
|
|
cvt.sat.f32.f32 %f377, %f376;
|
|
mul.f32 %f378, %f377, %f377;
|
|
mul.f32 %f1164, %f1164, %f378;
|
|
|
|
BB0_24:
|
|
max.f32 %f422, %f1161, %f1162;
|
|
max.f32 %f423, %f422, %f1163;
|
|
mul.f32 %f97, %f85, %f1164;
|
|
mul.f32 %f424, %f97, %f423;
|
|
setp.lt.f32 %p38, %f424, 0f3727C5AC;
|
|
mov.pred %p131, -1;
|
|
mov.f32 %f104, 0f00000000;
|
|
mov.f32 %f105, %f104;
|
|
mov.f32 %f106, %f104;
|
|
mov.f32 %f107, %f104;
|
|
mov.f32 %f108, %f104;
|
|
mov.f32 %f109, %f104;
|
|
@%p38 bra BB0_26;
|
|
|
|
mul.f32 %f104, %f1161, %f97;
|
|
mul.f32 %f105, %f1162, %f97;
|
|
mul.f32 %f106, %f1163, %f97;
|
|
ld.global.u8 %rs10, [imageEnabled];
|
|
and.b16 %rs11, %rs10, 64;
|
|
setp.eq.s16 %p40, %rs11, 0;
|
|
selp.f32 %f107, 0f00000000, %f51, %p40;
|
|
selp.f32 %f108, 0f00000000, %f52, %p40;
|
|
selp.f32 %f109, 0f00000000, %f53, %p40;
|
|
mov.pred %p131, 0;
|
|
|
|
BB0_26:
|
|
@%p131 bra BB0_41;
|
|
|
|
setp.eq.s32 %p41, %r6, 0;
|
|
@%p41 bra BB0_38;
|
|
|
|
mov.f32 %f1175, 0f00000000;
|
|
setp.lt.s32 %p42, %r6, 1;
|
|
@%p42 bra BB0_37;
|
|
|
|
max.f32 %f111, %f432, %f236;
|
|
and.b32 %r8, %r6, 3;
|
|
setp.eq.s32 %p43, %r8, 0;
|
|
add.u64 %rd35, %SP, 0;
|
|
cvta.to.local.u64 %rd2, %rd35;
|
|
mov.f32 %f1175, 0f00000000;
|
|
mov.u32 %r194, 0;
|
|
@%p43 bra BB0_35;
|
|
|
|
setp.eq.s32 %p44, %r8, 1;
|
|
mov.f32 %f1172, 0f00000000;
|
|
mov.u32 %r192, 0;
|
|
@%p44 bra BB0_34;
|
|
|
|
setp.eq.s32 %p45, %r8, 2;
|
|
mov.f32 %f1171, 0f00000000;
|
|
mov.u32 %r191, 0;
|
|
@%p45 bra BB0_33;
|
|
|
|
sub.f32 %f444, %f275, %f270;
|
|
sub.f32 %f445, %f276, %f270;
|
|
sub.f32 %f446, %f277, %f270;
|
|
sub.f32 %f447, %f444, %f7;
|
|
sub.f32 %f448, %f445, %f8;
|
|
sub.f32 %f449, %f446, %f9;
|
|
mul.f32 %f450, %f448, %f448;
|
|
fma.rn.f32 %f451, %f447, %f447, %f450;
|
|
fma.rn.f32 %f452, %f449, %f449, %f451;
|
|
sqrt.rn.f32 %f443, %f452;
|
|
rcp.rn.f32 %f453, %f443;
|
|
mul.f32 %f439, %f453, %f447;
|
|
mul.f32 %f440, %f453, %f448;
|
|
mul.f32 %f441, %f453, %f449;
|
|
ld.global.u32 %r75, [imageEnabled];
|
|
and.b32 %r76, %r75, 32;
|
|
setp.eq.s32 %p46, %r76, 0;
|
|
selp.f32 %f454, 0f3F800000, 0f41200000, %p46;
|
|
mul.f32 %f442, %f454, %f111;
|
|
mov.u32 %r77, 1065353216;
|
|
st.local.u32 [%rd2], %r77;
|
|
ld.global.u32 %r71, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r71, %f10, %f11, %f12, %f439, %f440, %f441, %r44, %f442, %f443, %rd35, %r28);
|
|
// inline asm
|
|
ld.local.f32 %f455, [%rd2];
|
|
add.f32 %f1171, %f455, 0f00000000;
|
|
mov.u32 %r191, %r44;
|
|
|
|
BB0_33:
|
|
cvt.rn.f32.s32 %f464, %r191;
|
|
mul.f32 %f465, %f464, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f466, %f465;
|
|
sub.f32 %f467, %f465, %f466;
|
|
mul.f32 %f468, %f464, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f469, %f468;
|
|
sub.f32 %f470, %f468, %f469;
|
|
mul.f32 %f471, %f464, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f472, %f471;
|
|
sub.f32 %f473, %f471, %f472;
|
|
add.f32 %f474, %f470, 0f4199851F;
|
|
add.f32 %f475, %f473, 0f4199851F;
|
|
add.f32 %f476, %f467, 0f4199851F;
|
|
mul.f32 %f477, %f470, %f475;
|
|
fma.rn.f32 %f478, %f467, %f474, %f477;
|
|
fma.rn.f32 %f479, %f476, %f473, %f478;
|
|
add.f32 %f480, %f467, %f479;
|
|
add.f32 %f481, %f470, %f479;
|
|
add.f32 %f482, %f473, %f479;
|
|
add.f32 %f483, %f480, %f481;
|
|
mul.f32 %f484, %f482, %f483;
|
|
cvt.rmi.f32.f32 %f485, %f484;
|
|
sub.f32 %f486, %f484, %f485;
|
|
add.f32 %f487, %f480, %f482;
|
|
mul.f32 %f488, %f481, %f487;
|
|
cvt.rmi.f32.f32 %f489, %f488;
|
|
sub.f32 %f490, %f488, %f489;
|
|
add.f32 %f491, %f481, %f482;
|
|
mul.f32 %f492, %f480, %f491;
|
|
cvt.rmi.f32.f32 %f493, %f492;
|
|
sub.f32 %f494, %f492, %f493;
|
|
fma.rn.f32 %f495, %f486, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f496, %f490, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f497, %f494, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f498, %f270, %f495, %f275;
|
|
fma.rn.f32 %f499, %f270, %f496, %f276;
|
|
fma.rn.f32 %f500, %f270, %f497, %f277;
|
|
sub.f32 %f501, %f498, %f7;
|
|
sub.f32 %f502, %f499, %f8;
|
|
sub.f32 %f503, %f500, %f9;
|
|
mul.f32 %f504, %f502, %f502;
|
|
fma.rn.f32 %f505, %f501, %f501, %f504;
|
|
fma.rn.f32 %f506, %f503, %f503, %f505;
|
|
sqrt.rn.f32 %f463, %f506;
|
|
rcp.rn.f32 %f507, %f463;
|
|
mul.f32 %f459, %f507, %f501;
|
|
mul.f32 %f460, %f507, %f502;
|
|
mul.f32 %f461, %f507, %f503;
|
|
ld.global.u32 %r81, [imageEnabled];
|
|
and.b32 %r82, %r81, 32;
|
|
setp.eq.s32 %p47, %r82, 0;
|
|
selp.f32 %f508, 0f3F800000, 0f41200000, %p47;
|
|
mul.f32 %f462, %f508, %f111;
|
|
mov.u32 %r83, 1065353216;
|
|
st.local.u32 [%rd2], %r83;
|
|
ld.global.u32 %r78, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r78, %f10, %f11, %f12, %f459, %f460, %f461, %r44, %f462, %f463, %rd35, %r28);
|
|
// inline asm
|
|
ld.local.f32 %f509, [%rd2];
|
|
add.f32 %f1172, %f1171, %f509;
|
|
add.s32 %r192, %r191, 1;
|
|
|
|
BB0_34:
|
|
cvt.rn.f32.s32 %f518, %r192;
|
|
mul.f32 %f519, %f518, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f520, %f519;
|
|
sub.f32 %f521, %f519, %f520;
|
|
mul.f32 %f522, %f518, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f523, %f522;
|
|
sub.f32 %f524, %f522, %f523;
|
|
mul.f32 %f525, %f518, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f526, %f525;
|
|
sub.f32 %f527, %f525, %f526;
|
|
add.f32 %f528, %f524, 0f4199851F;
|
|
add.f32 %f529, %f527, 0f4199851F;
|
|
add.f32 %f530, %f521, 0f4199851F;
|
|
mul.f32 %f531, %f524, %f529;
|
|
fma.rn.f32 %f532, %f521, %f528, %f531;
|
|
fma.rn.f32 %f533, %f530, %f527, %f532;
|
|
add.f32 %f534, %f521, %f533;
|
|
add.f32 %f535, %f524, %f533;
|
|
add.f32 %f536, %f527, %f533;
|
|
add.f32 %f537, %f534, %f535;
|
|
mul.f32 %f538, %f536, %f537;
|
|
cvt.rmi.f32.f32 %f539, %f538;
|
|
sub.f32 %f540, %f538, %f539;
|
|
add.f32 %f541, %f534, %f536;
|
|
mul.f32 %f542, %f535, %f541;
|
|
cvt.rmi.f32.f32 %f543, %f542;
|
|
sub.f32 %f544, %f542, %f543;
|
|
add.f32 %f545, %f535, %f536;
|
|
mul.f32 %f546, %f534, %f545;
|
|
cvt.rmi.f32.f32 %f547, %f546;
|
|
sub.f32 %f548, %f546, %f547;
|
|
fma.rn.f32 %f549, %f540, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f550, %f544, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f551, %f548, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f552, %f270, %f549, %f275;
|
|
fma.rn.f32 %f553, %f270, %f550, %f276;
|
|
fma.rn.f32 %f554, %f270, %f551, %f277;
|
|
sub.f32 %f555, %f552, %f7;
|
|
sub.f32 %f556, %f553, %f8;
|
|
sub.f32 %f557, %f554, %f9;
|
|
mul.f32 %f558, %f556, %f556;
|
|
fma.rn.f32 %f559, %f555, %f555, %f558;
|
|
fma.rn.f32 %f560, %f557, %f557, %f559;
|
|
sqrt.rn.f32 %f517, %f560;
|
|
rcp.rn.f32 %f561, %f517;
|
|
mul.f32 %f513, %f561, %f555;
|
|
mul.f32 %f514, %f561, %f556;
|
|
mul.f32 %f515, %f561, %f557;
|
|
ld.global.u32 %r87, [imageEnabled];
|
|
and.b32 %r88, %r87, 32;
|
|
setp.eq.s32 %p48, %r88, 0;
|
|
selp.f32 %f562, 0f3F800000, 0f41200000, %p48;
|
|
mul.f32 %f516, %f562, %f111;
|
|
mov.u32 %r89, 1065353216;
|
|
st.local.u32 [%rd2], %r89;
|
|
ld.global.u32 %r84, [root];
|
|
mov.u32 %r85, 1;
|
|
// inline asm
|
|
call _rt_trace_64, (%r84, %f10, %f11, %f12, %f513, %f514, %f515, %r85, %f516, %f517, %rd35, %r28);
|
|
// inline asm
|
|
ld.local.f32 %f563, [%rd2];
|
|
add.f32 %f1175, %f1172, %f563;
|
|
add.s32 %r194, %r192, 1;
|
|
|
|
BB0_35:
|
|
setp.lt.u32 %p49, %r6, 4;
|
|
@%p49 bra BB0_37;
|
|
|
|
BB0_36:
|
|
cvt.rn.f32.s32 %f596, %r194;
|
|
mul.f32 %f597, %f596, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f598, %f597;
|
|
sub.f32 %f599, %f597, %f598;
|
|
mul.f32 %f600, %f596, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f601, %f600;
|
|
sub.f32 %f602, %f600, %f601;
|
|
mul.f32 %f603, %f596, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f604, %f603;
|
|
sub.f32 %f605, %f603, %f604;
|
|
add.f32 %f606, %f602, 0f4199851F;
|
|
add.f32 %f607, %f605, 0f4199851F;
|
|
add.f32 %f608, %f599, 0f4199851F;
|
|
mul.f32 %f609, %f602, %f607;
|
|
fma.rn.f32 %f610, %f599, %f606, %f609;
|
|
fma.rn.f32 %f611, %f608, %f605, %f610;
|
|
add.f32 %f612, %f599, %f611;
|
|
add.f32 %f613, %f602, %f611;
|
|
add.f32 %f614, %f605, %f611;
|
|
add.f32 %f615, %f612, %f613;
|
|
mul.f32 %f616, %f614, %f615;
|
|
cvt.rmi.f32.f32 %f617, %f616;
|
|
sub.f32 %f618, %f616, %f617;
|
|
add.f32 %f619, %f612, %f614;
|
|
mul.f32 %f620, %f613, %f619;
|
|
cvt.rmi.f32.f32 %f621, %f620;
|
|
sub.f32 %f622, %f620, %f621;
|
|
add.f32 %f623, %f613, %f614;
|
|
mul.f32 %f624, %f612, %f623;
|
|
cvt.rmi.f32.f32 %f625, %f624;
|
|
sub.f32 %f626, %f624, %f625;
|
|
fma.rn.f32 %f627, %f618, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f628, %f622, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f629, %f626, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f630, %f270, %f627, %f275;
|
|
fma.rn.f32 %f631, %f270, %f628, %f276;
|
|
fma.rn.f32 %f632, %f270, %f629, %f277;
|
|
sub.f32 %f633, %f630, %f7;
|
|
sub.f32 %f634, %f631, %f8;
|
|
sub.f32 %f635, %f632, %f9;
|
|
mul.f32 %f636, %f634, %f634;
|
|
fma.rn.f32 %f637, %f633, %f633, %f636;
|
|
fma.rn.f32 %f638, %f635, %f635, %f637;
|
|
sqrt.rn.f32 %f571, %f638;
|
|
rcp.rn.f32 %f639, %f571;
|
|
mul.f32 %f567, %f639, %f633;
|
|
mul.f32 %f568, %f639, %f634;
|
|
mul.f32 %f569, %f639, %f635;
|
|
ld.global.u32 %r102, [imageEnabled];
|
|
and.b32 %r103, %r102, 32;
|
|
setp.eq.s32 %p50, %r103, 0;
|
|
selp.f32 %f640, 0f3F800000, 0f41200000, %p50;
|
|
mul.f32 %f570, %f640, %f111;
|
|
mov.u32 %r104, 1065353216;
|
|
st.local.u32 [%rd2], %r104;
|
|
ld.global.u32 %r90, [root];
|
|
mov.u32 %r100, 1;
|
|
// inline asm
|
|
call _rt_trace_64, (%r90, %f10, %f11, %f12, %f567, %f568, %f569, %r100, %f570, %f571, %rd35, %r28);
|
|
// inline asm
|
|
ld.local.f32 %f641, [%rd2];
|
|
add.f32 %f642, %f1175, %f641;
|
|
add.s32 %r105, %r194, 1;
|
|
cvt.rn.f32.s32 %f643, %r105;
|
|
mul.f32 %f644, %f643, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f645, %f644;
|
|
sub.f32 %f646, %f644, %f645;
|
|
mul.f32 %f647, %f643, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f648, %f647;
|
|
sub.f32 %f649, %f647, %f648;
|
|
mul.f32 %f650, %f643, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f651, %f650;
|
|
sub.f32 %f652, %f650, %f651;
|
|
add.f32 %f653, %f649, 0f4199851F;
|
|
add.f32 %f654, %f652, 0f4199851F;
|
|
add.f32 %f655, %f646, 0f4199851F;
|
|
mul.f32 %f656, %f649, %f654;
|
|
fma.rn.f32 %f657, %f646, %f653, %f656;
|
|
fma.rn.f32 %f658, %f655, %f652, %f657;
|
|
add.f32 %f659, %f646, %f658;
|
|
add.f32 %f660, %f649, %f658;
|
|
add.f32 %f661, %f652, %f658;
|
|
add.f32 %f662, %f659, %f660;
|
|
mul.f32 %f663, %f661, %f662;
|
|
cvt.rmi.f32.f32 %f664, %f663;
|
|
sub.f32 %f665, %f663, %f664;
|
|
add.f32 %f666, %f659, %f661;
|
|
mul.f32 %f667, %f660, %f666;
|
|
cvt.rmi.f32.f32 %f668, %f667;
|
|
sub.f32 %f669, %f667, %f668;
|
|
add.f32 %f670, %f660, %f661;
|
|
mul.f32 %f671, %f659, %f670;
|
|
cvt.rmi.f32.f32 %f672, %f671;
|
|
sub.f32 %f673, %f671, %f672;
|
|
fma.rn.f32 %f674, %f665, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f675, %f669, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f676, %f673, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f677, %f270, %f674, %f275;
|
|
fma.rn.f32 %f678, %f270, %f675, %f276;
|
|
fma.rn.f32 %f679, %f270, %f676, %f277;
|
|
sub.f32 %f680, %f677, %f7;
|
|
sub.f32 %f681, %f678, %f8;
|
|
sub.f32 %f682, %f679, %f9;
|
|
mul.f32 %f683, %f681, %f681;
|
|
fma.rn.f32 %f684, %f680, %f680, %f683;
|
|
fma.rn.f32 %f685, %f682, %f682, %f684;
|
|
sqrt.rn.f32 %f579, %f685;
|
|
rcp.rn.f32 %f686, %f579;
|
|
mul.f32 %f575, %f686, %f680;
|
|
mul.f32 %f576, %f686, %f681;
|
|
mul.f32 %f577, %f686, %f682;
|
|
ld.global.u32 %r106, [imageEnabled];
|
|
and.b32 %r107, %r106, 32;
|
|
setp.eq.s32 %p51, %r107, 0;
|
|
selp.f32 %f687, 0f3F800000, 0f41200000, %p51;
|
|
mul.f32 %f578, %f687, %f111;
|
|
st.local.u32 [%rd2], %r104;
|
|
ld.global.u32 %r93, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r93, %f10, %f11, %f12, %f575, %f576, %f577, %r100, %f578, %f579, %rd35, %r28);
|
|
// inline asm
|
|
ld.local.f32 %f688, [%rd2];
|
|
add.f32 %f689, %f642, %f688;
|
|
add.s32 %r108, %r194, 2;
|
|
cvt.rn.f32.s32 %f690, %r108;
|
|
mul.f32 %f691, %f690, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f692, %f691;
|
|
sub.f32 %f693, %f691, %f692;
|
|
mul.f32 %f694, %f690, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f695, %f694;
|
|
sub.f32 %f696, %f694, %f695;
|
|
mul.f32 %f697, %f690, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f698, %f697;
|
|
sub.f32 %f699, %f697, %f698;
|
|
add.f32 %f700, %f696, 0f4199851F;
|
|
add.f32 %f701, %f699, 0f4199851F;
|
|
add.f32 %f702, %f693, 0f4199851F;
|
|
mul.f32 %f703, %f696, %f701;
|
|
fma.rn.f32 %f704, %f693, %f700, %f703;
|
|
fma.rn.f32 %f705, %f702, %f699, %f704;
|
|
add.f32 %f706, %f693, %f705;
|
|
add.f32 %f707, %f696, %f705;
|
|
add.f32 %f708, %f699, %f705;
|
|
add.f32 %f709, %f706, %f707;
|
|
mul.f32 %f710, %f708, %f709;
|
|
cvt.rmi.f32.f32 %f711, %f710;
|
|
sub.f32 %f712, %f710, %f711;
|
|
add.f32 %f713, %f706, %f708;
|
|
mul.f32 %f714, %f707, %f713;
|
|
cvt.rmi.f32.f32 %f715, %f714;
|
|
sub.f32 %f716, %f714, %f715;
|
|
add.f32 %f717, %f707, %f708;
|
|
mul.f32 %f718, %f706, %f717;
|
|
cvt.rmi.f32.f32 %f719, %f718;
|
|
sub.f32 %f720, %f718, %f719;
|
|
fma.rn.f32 %f721, %f712, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f722, %f716, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f723, %f720, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f724, %f270, %f721, %f275;
|
|
fma.rn.f32 %f725, %f270, %f722, %f276;
|
|
fma.rn.f32 %f726, %f270, %f723, %f277;
|
|
sub.f32 %f727, %f724, %f7;
|
|
sub.f32 %f728, %f725, %f8;
|
|
sub.f32 %f729, %f726, %f9;
|
|
mul.f32 %f730, %f728, %f728;
|
|
fma.rn.f32 %f731, %f727, %f727, %f730;
|
|
fma.rn.f32 %f732, %f729, %f729, %f731;
|
|
sqrt.rn.f32 %f587, %f732;
|
|
rcp.rn.f32 %f733, %f587;
|
|
mul.f32 %f583, %f733, %f727;
|
|
mul.f32 %f584, %f733, %f728;
|
|
mul.f32 %f585, %f733, %f729;
|
|
ld.global.u32 %r109, [imageEnabled];
|
|
and.b32 %r110, %r109, 32;
|
|
setp.eq.s32 %p52, %r110, 0;
|
|
selp.f32 %f734, 0f3F800000, 0f41200000, %p52;
|
|
mul.f32 %f586, %f734, %f111;
|
|
st.local.u32 [%rd2], %r104;
|
|
ld.global.u32 %r96, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r96, %f10, %f11, %f12, %f583, %f584, %f585, %r100, %f586, %f587, %rd35, %r28);
|
|
// inline asm
|
|
ld.local.f32 %f735, [%rd2];
|
|
add.f32 %f736, %f689, %f735;
|
|
add.s32 %r111, %r194, 3;
|
|
cvt.rn.f32.s32 %f737, %r111;
|
|
mul.f32 %f738, %f737, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f739, %f738;
|
|
sub.f32 %f740, %f738, %f739;
|
|
mul.f32 %f741, %f737, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f742, %f741;
|
|
sub.f32 %f743, %f741, %f742;
|
|
mul.f32 %f744, %f737, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f745, %f744;
|
|
sub.f32 %f746, %f744, %f745;
|
|
add.f32 %f747, %f743, 0f4199851F;
|
|
add.f32 %f748, %f746, 0f4199851F;
|
|
add.f32 %f749, %f740, 0f4199851F;
|
|
mul.f32 %f750, %f743, %f748;
|
|
fma.rn.f32 %f751, %f740, %f747, %f750;
|
|
fma.rn.f32 %f752, %f749, %f746, %f751;
|
|
add.f32 %f753, %f740, %f752;
|
|
add.f32 %f754, %f743, %f752;
|
|
add.f32 %f755, %f746, %f752;
|
|
add.f32 %f756, %f753, %f754;
|
|
mul.f32 %f757, %f755, %f756;
|
|
cvt.rmi.f32.f32 %f758, %f757;
|
|
sub.f32 %f759, %f757, %f758;
|
|
add.f32 %f760, %f753, %f755;
|
|
mul.f32 %f761, %f754, %f760;
|
|
cvt.rmi.f32.f32 %f762, %f761;
|
|
sub.f32 %f763, %f761, %f762;
|
|
add.f32 %f764, %f754, %f755;
|
|
mul.f32 %f765, %f753, %f764;
|
|
cvt.rmi.f32.f32 %f766, %f765;
|
|
sub.f32 %f767, %f765, %f766;
|
|
fma.rn.f32 %f768, %f759, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f769, %f763, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f770, %f767, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f771, %f270, %f768, %f275;
|
|
fma.rn.f32 %f772, %f270, %f769, %f276;
|
|
fma.rn.f32 %f773, %f270, %f770, %f277;
|
|
sub.f32 %f774, %f771, %f7;
|
|
sub.f32 %f775, %f772, %f8;
|
|
sub.f32 %f776, %f773, %f9;
|
|
mul.f32 %f777, %f775, %f775;
|
|
fma.rn.f32 %f778, %f774, %f774, %f777;
|
|
fma.rn.f32 %f779, %f776, %f776, %f778;
|
|
sqrt.rn.f32 %f595, %f779;
|
|
rcp.rn.f32 %f780, %f595;
|
|
mul.f32 %f591, %f780, %f774;
|
|
mul.f32 %f592, %f780, %f775;
|
|
mul.f32 %f593, %f780, %f776;
|
|
ld.global.u32 %r112, [imageEnabled];
|
|
and.b32 %r113, %r112, 32;
|
|
setp.eq.s32 %p53, %r113, 0;
|
|
selp.f32 %f781, 0f3F800000, 0f41200000, %p53;
|
|
mul.f32 %f594, %f781, %f111;
|
|
st.local.u32 [%rd2], %r104;
|
|
ld.global.u32 %r99, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r99, %f10, %f11, %f12, %f591, %f592, %f593, %r100, %f594, %f595, %rd35, %r28);
|
|
// inline asm
|
|
ld.local.f32 %f782, [%rd2];
|
|
add.f32 %f1175, %f736, %f782;
|
|
add.s32 %r194, %r194, 4;
|
|
setp.lt.s32 %p54, %r194, %r6;
|
|
@%p54 bra BB0_36;
|
|
|
|
BB0_37:
|
|
cvt.rn.f32.s32 %f783, %r6;
|
|
div.rn.f32 %f1176, %f1175, %f783;
|
|
|
|
BB0_38:
|
|
fma.rn.f32 %f1157, %f104, %f1176, %f1157;
|
|
fma.rn.f32 %f1156, %f105, %f1176, %f1156;
|
|
fma.rn.f32 %f1155, %f106, %f1176, %f1155;
|
|
ld.global.u8 %rs12, [imageEnabled];
|
|
and.b16 %rs13, %rs12, 64;
|
|
setp.eq.s16 %p55, %rs13, 0;
|
|
@%p55 bra BB0_40;
|
|
|
|
mul.f32 %f784, %f105, 0f3F372474;
|
|
fma.rn.f32 %f785, %f104, 0f3E59999A, %f784;
|
|
fma.rn.f32 %f786, %f106, 0f3D93A92A, %f785;
|
|
fma.rn.f32 %f20, %f107, %f786, %f20;
|
|
fma.rn.f32 %f19, %f108, %f786, %f19;
|
|
fma.rn.f32 %f18, %f786, %f109, %f18;
|
|
|
|
BB0_40:
|
|
add.f32 %f1151, %f1151, %f1176;
|
|
|
|
BB0_41:
|
|
add.s32 %r190, %r190, 1;
|
|
setp.lt.u32 %p56, %r190, %r4;
|
|
@%p56 bra BB0_5;
|
|
|
|
BB0_42:
|
|
ld.global.u32 %r196, [imageEnabled];
|
|
and.b32 %r114, %r196, 8;
|
|
setp.eq.s32 %p57, %r114, 0;
|
|
@%p57 bra BB0_55;
|
|
|
|
cvt.sat.f32.f32 %f147, %f1151;
|
|
cvt.u64.u32 %rd46, %r3;
|
|
cvt.u64.u32 %rd45, %r2;
|
|
mov.u64 %rd49, image_Mask;
|
|
cvta.global.u64 %rd44, %rd49;
|
|
// inline asm
|
|
call (%rd43), _rt_buffer_get_64, (%rd44, %r27, %r27, %rd45, %rd46, %rd13, %rd13);
|
|
// inline asm
|
|
mov.f32 %f789, 0f3E68BA2E;
|
|
cvt.rzi.f32.f32 %f790, %f789;
|
|
fma.rn.f32 %f791, %f790, 0fC0000000, 0f3EE8BA2E;
|
|
abs.f32 %f148, %f791;
|
|
abs.f32 %f149, %f147;
|
|
setp.lt.f32 %p58, %f149, 0f00800000;
|
|
mul.f32 %f792, %f149, 0f4B800000;
|
|
selp.f32 %f793, 0fC3170000, 0fC2FE0000, %p58;
|
|
selp.f32 %f794, %f792, %f149, %p58;
|
|
mov.b32 %r117, %f794;
|
|
and.b32 %r118, %r117, 8388607;
|
|
or.b32 %r119, %r118, 1065353216;
|
|
mov.b32 %f795, %r119;
|
|
shr.u32 %r120, %r117, 23;
|
|
cvt.rn.f32.u32 %f796, %r120;
|
|
add.f32 %f797, %f793, %f796;
|
|
setp.gt.f32 %p59, %f795, 0f3FB504F3;
|
|
mul.f32 %f798, %f795, 0f3F000000;
|
|
add.f32 %f799, %f797, 0f3F800000;
|
|
selp.f32 %f800, %f798, %f795, %p59;
|
|
selp.f32 %f801, %f799, %f797, %p59;
|
|
add.f32 %f802, %f800, 0fBF800000;
|
|
add.f32 %f788, %f800, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f787,%f788;
|
|
// inline asm
|
|
add.f32 %f803, %f802, %f802;
|
|
mul.f32 %f804, %f787, %f803;
|
|
mul.f32 %f805, %f804, %f804;
|
|
mov.f32 %f806, 0f3C4CAF63;
|
|
mov.f32 %f807, 0f3B18F0FE;
|
|
fma.rn.f32 %f808, %f807, %f805, %f806;
|
|
mov.f32 %f809, 0f3DAAAABD;
|
|
fma.rn.f32 %f810, %f808, %f805, %f809;
|
|
mul.rn.f32 %f811, %f810, %f805;
|
|
mul.rn.f32 %f812, %f811, %f804;
|
|
sub.f32 %f813, %f802, %f804;
|
|
neg.f32 %f814, %f804;
|
|
add.f32 %f815, %f813, %f813;
|
|
fma.rn.f32 %f816, %f814, %f802, %f815;
|
|
mul.rn.f32 %f817, %f787, %f816;
|
|
add.f32 %f818, %f812, %f804;
|
|
sub.f32 %f819, %f804, %f818;
|
|
add.f32 %f820, %f812, %f819;
|
|
add.f32 %f821, %f817, %f820;
|
|
add.f32 %f822, %f818, %f821;
|
|
sub.f32 %f823, %f818, %f822;
|
|
add.f32 %f824, %f821, %f823;
|
|
mov.f32 %f825, 0f3F317200;
|
|
mul.rn.f32 %f826, %f801, %f825;
|
|
mov.f32 %f827, 0f35BFBE8E;
|
|
mul.rn.f32 %f828, %f801, %f827;
|
|
add.f32 %f829, %f826, %f822;
|
|
sub.f32 %f830, %f826, %f829;
|
|
add.f32 %f831, %f822, %f830;
|
|
add.f32 %f832, %f824, %f831;
|
|
add.f32 %f833, %f828, %f832;
|
|
add.f32 %f834, %f829, %f833;
|
|
sub.f32 %f835, %f829, %f834;
|
|
add.f32 %f836, %f833, %f835;
|
|
mov.f32 %f837, 0f3EE8BA2E;
|
|
mul.rn.f32 %f838, %f837, %f834;
|
|
neg.f32 %f839, %f838;
|
|
fma.rn.f32 %f840, %f837, %f834, %f839;
|
|
fma.rn.f32 %f841, %f837, %f836, %f840;
|
|
mov.f32 %f842, 0f00000000;
|
|
fma.rn.f32 %f843, %f842, %f834, %f841;
|
|
add.rn.f32 %f844, %f838, %f843;
|
|
neg.f32 %f845, %f844;
|
|
add.rn.f32 %f846, %f838, %f845;
|
|
add.rn.f32 %f847, %f846, %f843;
|
|
mov.b32 %r121, %f844;
|
|
setp.eq.s32 %p60, %r121, 1118925336;
|
|
add.s32 %r122, %r121, -1;
|
|
mov.b32 %f848, %r122;
|
|
add.f32 %f849, %f847, 0f37000000;
|
|
selp.f32 %f850, %f848, %f844, %p60;
|
|
selp.f32 %f150, %f849, %f847, %p60;
|
|
mul.f32 %f851, %f850, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f852, %f851;
|
|
mov.f32 %f853, 0fBF317200;
|
|
fma.rn.f32 %f854, %f852, %f853, %f850;
|
|
mov.f32 %f855, 0fB5BFBE8E;
|
|
fma.rn.f32 %f856, %f852, %f855, %f854;
|
|
mul.f32 %f857, %f856, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f858, %f857;
|
|
add.f32 %f859, %f852, 0f00000000;
|
|
ex2.approx.f32 %f860, %f859;
|
|
mul.f32 %f861, %f858, %f860;
|
|
setp.lt.f32 %p61, %f850, 0fC2D20000;
|
|
selp.f32 %f862, 0f00000000, %f861, %p61;
|
|
setp.gt.f32 %p62, %f850, 0f42D20000;
|
|
selp.f32 %f1194, 0f7F800000, %f862, %p62;
|
|
setp.eq.f32 %p63, %f1194, 0f7F800000;
|
|
@%p63 bra BB0_45;
|
|
|
|
fma.rn.f32 %f1194, %f1194, %f150, %f1194;
|
|
|
|
BB0_45:
|
|
setp.lt.f32 %p64, %f147, 0f00000000;
|
|
setp.eq.f32 %p65, %f148, 0f3F800000;
|
|
and.pred %p4, %p64, %p65;
|
|
mov.b32 %r123, %f1194;
|
|
xor.b32 %r124, %r123, -2147483648;
|
|
mov.b32 %f863, %r124;
|
|
selp.f32 %f1196, %f863, %f1194, %p4;
|
|
setp.eq.f32 %p66, %f147, 0f00000000;
|
|
@%p66 bra BB0_48;
|
|
bra.uni BB0_46;
|
|
|
|
BB0_48:
|
|
add.f32 %f866, %f147, %f147;
|
|
selp.f32 %f1196, %f866, 0f00000000, %p65;
|
|
bra.uni BB0_49;
|
|
|
|
BB0_103:
|
|
mov.u64 %rd117, image_HDR;
|
|
cvta.global.u64 %rd112, %rd117;
|
|
mov.u32 %r187, 8;
|
|
// inline asm
|
|
call (%rd111), _rt_buffer_get_64, (%rd112, %r27, %r187, %rd6, %rd7, %rd13, %rd13);
|
|
// inline asm
|
|
mov.f32 %f1147, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs54, %f1147;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs55, 0;
|
|
st.v4.u16 [%rd111], {%rs54, %rs54, %rs54, %rs55};
|
|
|
|
BB0_104:
|
|
ld.global.u8 %rs56, [imageEnabled];
|
|
and.b16 %rs57, %rs56, 64;
|
|
setp.eq.s16 %p130, %rs57, 0;
|
|
@%p130 bra BB0_106;
|
|
|
|
cvt.u64.u32 %rd120, %r2;
|
|
cvt.u64.u32 %rd121, %r3;
|
|
mov.u64 %rd124, image_Dir;
|
|
cvta.global.u64 %rd119, %rd124;
|
|
// inline asm
|
|
call (%rd118), _rt_buffer_get_64, (%rd119, %r27, %r28, %rd120, %rd121, %rd13, %rd13);
|
|
// inline asm
|
|
mov.u16 %rs58, 0;
|
|
st.v4.u8 [%rd118], {%rs58, %rs58, %rs58, %rs58};
|
|
bra.uni BB0_106;
|
|
|
|
BB0_46:
|
|
setp.geu.f32 %p67, %f147, 0f00000000;
|
|
@%p67 bra BB0_49;
|
|
|
|
cvt.rzi.f32.f32 %f865, %f837;
|
|
setp.neu.f32 %p68, %f865, 0f3EE8BA2E;
|
|
selp.f32 %f1196, 0f7FFFFFFF, %f1196, %p68;
|
|
|
|
BB0_49:
|
|
add.f32 %f867, %f149, 0f3EE8BA2E;
|
|
mov.b32 %r125, %f867;
|
|
setp.lt.s32 %p70, %r125, 2139095040;
|
|
@%p70 bra BB0_54;
|
|
|
|
setp.gtu.f32 %p71, %f149, 0f7F800000;
|
|
@%p71 bra BB0_53;
|
|
bra.uni BB0_51;
|
|
|
|
BB0_53:
|
|
add.f32 %f1196, %f147, 0f3EE8BA2E;
|
|
bra.uni BB0_54;
|
|
|
|
BB0_51:
|
|
setp.neu.f32 %p72, %f149, 0f7F800000;
|
|
@%p72 bra BB0_54;
|
|
|
|
selp.f32 %f1196, 0fFF800000, 0f7F800000, %p4;
|
|
|
|
BB0_54:
|
|
mul.f32 %f868, %f1196, 0f437F0000;
|
|
setp.eq.f32 %p73, %f147, 0f3F800000;
|
|
selp.f32 %f869, 0f437F0000, %f868, %p73;
|
|
cvt.rzi.u32.f32 %r126, %f869;
|
|
cvt.u16.u32 %rs14, %r126;
|
|
mov.u16 %rs15, 255;
|
|
st.v2.u8 [%rd43], {%rs14, %rs15};
|
|
ld.global.u32 %r196, [imageEnabled];
|
|
|
|
BB0_55:
|
|
and.b32 %r127, %r196, 1;
|
|
setp.eq.b32 %p74, %r127, 1;
|
|
@!%p74 bra BB0_90;
|
|
bra.uni BB0_56;
|
|
|
|
BB0_56:
|
|
mov.f32 %f872, 0f3E666666;
|
|
cvt.rzi.f32.f32 %f873, %f872;
|
|
fma.rn.f32 %f874, %f873, 0fC0000000, 0f3EE66666;
|
|
abs.f32 %f161, %f874;
|
|
abs.f32 %f162, %f1157;
|
|
setp.lt.f32 %p75, %f162, 0f00800000;
|
|
mul.f32 %f875, %f162, 0f4B800000;
|
|
selp.f32 %f876, 0fC3170000, 0fC2FE0000, %p75;
|
|
selp.f32 %f877, %f875, %f162, %p75;
|
|
mov.b32 %r128, %f877;
|
|
and.b32 %r129, %r128, 8388607;
|
|
or.b32 %r130, %r129, 1065353216;
|
|
mov.b32 %f878, %r130;
|
|
shr.u32 %r131, %r128, 23;
|
|
cvt.rn.f32.u32 %f879, %r131;
|
|
add.f32 %f880, %f876, %f879;
|
|
setp.gt.f32 %p76, %f878, 0f3FB504F3;
|
|
mul.f32 %f881, %f878, 0f3F000000;
|
|
add.f32 %f882, %f880, 0f3F800000;
|
|
selp.f32 %f883, %f881, %f878, %p76;
|
|
selp.f32 %f884, %f882, %f880, %p76;
|
|
add.f32 %f885, %f883, 0fBF800000;
|
|
add.f32 %f871, %f883, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f870,%f871;
|
|
// inline asm
|
|
add.f32 %f886, %f885, %f885;
|
|
mul.f32 %f887, %f870, %f886;
|
|
mul.f32 %f888, %f887, %f887;
|
|
mov.f32 %f889, 0f3C4CAF63;
|
|
mov.f32 %f890, 0f3B18F0FE;
|
|
fma.rn.f32 %f891, %f890, %f888, %f889;
|
|
mov.f32 %f892, 0f3DAAAABD;
|
|
fma.rn.f32 %f893, %f891, %f888, %f892;
|
|
mul.rn.f32 %f894, %f893, %f888;
|
|
mul.rn.f32 %f895, %f894, %f887;
|
|
sub.f32 %f896, %f885, %f887;
|
|
neg.f32 %f897, %f887;
|
|
add.f32 %f898, %f896, %f896;
|
|
fma.rn.f32 %f899, %f897, %f885, %f898;
|
|
mul.rn.f32 %f900, %f870, %f899;
|
|
add.f32 %f901, %f895, %f887;
|
|
sub.f32 %f902, %f887, %f901;
|
|
add.f32 %f903, %f895, %f902;
|
|
add.f32 %f904, %f900, %f903;
|
|
add.f32 %f905, %f901, %f904;
|
|
sub.f32 %f906, %f901, %f905;
|
|
add.f32 %f907, %f904, %f906;
|
|
mov.f32 %f908, 0f3F317200;
|
|
mul.rn.f32 %f909, %f884, %f908;
|
|
mov.f32 %f910, 0f35BFBE8E;
|
|
mul.rn.f32 %f911, %f884, %f910;
|
|
add.f32 %f912, %f909, %f905;
|
|
sub.f32 %f913, %f909, %f912;
|
|
add.f32 %f914, %f905, %f913;
|
|
add.f32 %f915, %f907, %f914;
|
|
add.f32 %f916, %f911, %f915;
|
|
add.f32 %f917, %f912, %f916;
|
|
sub.f32 %f918, %f912, %f917;
|
|
add.f32 %f919, %f916, %f918;
|
|
mov.f32 %f920, 0f3EE66666;
|
|
mul.rn.f32 %f921, %f920, %f917;
|
|
neg.f32 %f922, %f921;
|
|
fma.rn.f32 %f923, %f920, %f917, %f922;
|
|
fma.rn.f32 %f924, %f920, %f919, %f923;
|
|
mov.f32 %f925, 0f00000000;
|
|
fma.rn.f32 %f926, %f925, %f917, %f924;
|
|
add.rn.f32 %f927, %f921, %f926;
|
|
neg.f32 %f928, %f927;
|
|
add.rn.f32 %f929, %f921, %f928;
|
|
add.rn.f32 %f930, %f929, %f926;
|
|
mov.b32 %r132, %f927;
|
|
setp.eq.s32 %p77, %r132, 1118925336;
|
|
add.s32 %r133, %r132, -1;
|
|
mov.b32 %f931, %r133;
|
|
add.f32 %f932, %f930, 0f37000000;
|
|
selp.f32 %f933, %f931, %f927, %p77;
|
|
selp.f32 %f163, %f932, %f930, %p77;
|
|
mul.f32 %f934, %f933, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f935, %f934;
|
|
mov.f32 %f936, 0fBF317200;
|
|
fma.rn.f32 %f937, %f935, %f936, %f933;
|
|
mov.f32 %f938, 0fB5BFBE8E;
|
|
fma.rn.f32 %f939, %f935, %f938, %f937;
|
|
mul.f32 %f940, %f939, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f941, %f940;
|
|
add.f32 %f942, %f935, 0f00000000;
|
|
ex2.approx.f32 %f943, %f942;
|
|
mul.f32 %f944, %f941, %f943;
|
|
setp.lt.f32 %p78, %f933, 0fC2D20000;
|
|
selp.f32 %f945, 0f00000000, %f944, %p78;
|
|
setp.gt.f32 %p79, %f933, 0f42D20000;
|
|
selp.f32 %f1197, 0f7F800000, %f945, %p79;
|
|
setp.eq.f32 %p80, %f1197, 0f7F800000;
|
|
@%p80 bra BB0_58;
|
|
|
|
fma.rn.f32 %f1197, %f1197, %f163, %f1197;
|
|
|
|
BB0_58:
|
|
setp.lt.f32 %p81, %f1157, 0f00000000;
|
|
setp.eq.f32 %p82, %f161, 0f3F800000;
|
|
and.pred %p5, %p81, %p82;
|
|
mov.b32 %r134, %f1197;
|
|
xor.b32 %r135, %r134, -2147483648;
|
|
mov.b32 %f946, %r135;
|
|
selp.f32 %f1199, %f946, %f1197, %p5;
|
|
setp.eq.f32 %p83, %f1157, 0f00000000;
|
|
@%p83 bra BB0_61;
|
|
bra.uni BB0_59;
|
|
|
|
BB0_61:
|
|
add.f32 %f949, %f1157, %f1157;
|
|
selp.f32 %f1199, %f949, 0f00000000, %p82;
|
|
bra.uni BB0_62;
|
|
|
|
BB0_59:
|
|
setp.geu.f32 %p84, %f1157, 0f00000000;
|
|
@%p84 bra BB0_62;
|
|
|
|
cvt.rzi.f32.f32 %f948, %f920;
|
|
setp.neu.f32 %p85, %f948, 0f3EE66666;
|
|
selp.f32 %f1199, 0f7FFFFFFF, %f1199, %p85;
|
|
|
|
BB0_62:
|
|
add.f32 %f950, %f162, 0f3EE66666;
|
|
mov.b32 %r136, %f950;
|
|
setp.lt.s32 %p87, %r136, 2139095040;
|
|
@%p87 bra BB0_67;
|
|
|
|
setp.gtu.f32 %p88, %f162, 0f7F800000;
|
|
@%p88 bra BB0_66;
|
|
bra.uni BB0_64;
|
|
|
|
BB0_66:
|
|
add.f32 %f1199, %f1157, 0f3EE66666;
|
|
bra.uni BB0_67;
|
|
|
|
BB0_64:
|
|
setp.neu.f32 %p89, %f162, 0f7F800000;
|
|
@%p89 bra BB0_67;
|
|
|
|
selp.f32 %f1199, 0fFF800000, 0f7F800000, %p5;
|
|
|
|
BB0_67:
|
|
setp.eq.f32 %p90, %f1157, 0f3F800000;
|
|
selp.f32 %f174, 0f3F800000, %f1199, %p90;
|
|
abs.f32 %f175, %f1156;
|
|
setp.lt.f32 %p91, %f175, 0f00800000;
|
|
mul.f32 %f953, %f175, 0f4B800000;
|
|
selp.f32 %f954, 0fC3170000, 0fC2FE0000, %p91;
|
|
selp.f32 %f955, %f953, %f175, %p91;
|
|
mov.b32 %r137, %f955;
|
|
and.b32 %r138, %r137, 8388607;
|
|
or.b32 %r139, %r138, 1065353216;
|
|
mov.b32 %f956, %r139;
|
|
shr.u32 %r140, %r137, 23;
|
|
cvt.rn.f32.u32 %f957, %r140;
|
|
add.f32 %f958, %f954, %f957;
|
|
setp.gt.f32 %p92, %f956, 0f3FB504F3;
|
|
mul.f32 %f959, %f956, 0f3F000000;
|
|
add.f32 %f960, %f958, 0f3F800000;
|
|
selp.f32 %f961, %f959, %f956, %p92;
|
|
selp.f32 %f962, %f960, %f958, %p92;
|
|
add.f32 %f963, %f961, 0fBF800000;
|
|
add.f32 %f952, %f961, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f951,%f952;
|
|
// inline asm
|
|
add.f32 %f964, %f963, %f963;
|
|
mul.f32 %f965, %f951, %f964;
|
|
mul.f32 %f966, %f965, %f965;
|
|
fma.rn.f32 %f969, %f890, %f966, %f889;
|
|
fma.rn.f32 %f971, %f969, %f966, %f892;
|
|
mul.rn.f32 %f972, %f971, %f966;
|
|
mul.rn.f32 %f973, %f972, %f965;
|
|
sub.f32 %f974, %f963, %f965;
|
|
neg.f32 %f975, %f965;
|
|
add.f32 %f976, %f974, %f974;
|
|
fma.rn.f32 %f977, %f975, %f963, %f976;
|
|
mul.rn.f32 %f978, %f951, %f977;
|
|
add.f32 %f979, %f973, %f965;
|
|
sub.f32 %f980, %f965, %f979;
|
|
add.f32 %f981, %f973, %f980;
|
|
add.f32 %f982, %f978, %f981;
|
|
add.f32 %f983, %f979, %f982;
|
|
sub.f32 %f984, %f979, %f983;
|
|
add.f32 %f985, %f982, %f984;
|
|
mul.rn.f32 %f987, %f962, %f908;
|
|
mul.rn.f32 %f989, %f962, %f910;
|
|
add.f32 %f990, %f987, %f983;
|
|
sub.f32 %f991, %f987, %f990;
|
|
add.f32 %f992, %f983, %f991;
|
|
add.f32 %f993, %f985, %f992;
|
|
add.f32 %f994, %f989, %f993;
|
|
add.f32 %f995, %f990, %f994;
|
|
sub.f32 %f996, %f990, %f995;
|
|
add.f32 %f997, %f994, %f996;
|
|
mul.rn.f32 %f999, %f920, %f995;
|
|
neg.f32 %f1000, %f999;
|
|
fma.rn.f32 %f1001, %f920, %f995, %f1000;
|
|
fma.rn.f32 %f1002, %f920, %f997, %f1001;
|
|
fma.rn.f32 %f1004, %f925, %f995, %f1002;
|
|
add.rn.f32 %f1005, %f999, %f1004;
|
|
neg.f32 %f1006, %f1005;
|
|
add.rn.f32 %f1007, %f999, %f1006;
|
|
add.rn.f32 %f1008, %f1007, %f1004;
|
|
mov.b32 %r141, %f1005;
|
|
setp.eq.s32 %p93, %r141, 1118925336;
|
|
add.s32 %r142, %r141, -1;
|
|
mov.b32 %f1009, %r142;
|
|
add.f32 %f1010, %f1008, 0f37000000;
|
|
selp.f32 %f1011, %f1009, %f1005, %p93;
|
|
selp.f32 %f176, %f1010, %f1008, %p93;
|
|
mul.f32 %f1012, %f1011, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f1013, %f1012;
|
|
fma.rn.f32 %f1015, %f1013, %f936, %f1011;
|
|
fma.rn.f32 %f1017, %f1013, %f938, %f1015;
|
|
mul.f32 %f1018, %f1017, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f1019, %f1018;
|
|
add.f32 %f1020, %f1013, 0f00000000;
|
|
ex2.approx.f32 %f1021, %f1020;
|
|
mul.f32 %f1022, %f1019, %f1021;
|
|
setp.lt.f32 %p94, %f1011, 0fC2D20000;
|
|
selp.f32 %f1023, 0f00000000, %f1022, %p94;
|
|
setp.gt.f32 %p95, %f1011, 0f42D20000;
|
|
selp.f32 %f1200, 0f7F800000, %f1023, %p95;
|
|
setp.eq.f32 %p96, %f1200, 0f7F800000;
|
|
@%p96 bra BB0_69;
|
|
|
|
fma.rn.f32 %f1200, %f1200, %f176, %f1200;
|
|
|
|
BB0_69:
|
|
setp.lt.f32 %p97, %f1156, 0f00000000;
|
|
and.pred %p6, %p97, %p82;
|
|
mov.b32 %r143, %f1200;
|
|
xor.b32 %r144, %r143, -2147483648;
|
|
mov.b32 %f1024, %r144;
|
|
selp.f32 %f1202, %f1024, %f1200, %p6;
|
|
setp.eq.f32 %p99, %f1156, 0f00000000;
|
|
@%p99 bra BB0_72;
|
|
bra.uni BB0_70;
|
|
|
|
BB0_72:
|
|
add.f32 %f1027, %f1156, %f1156;
|
|
selp.f32 %f1202, %f1027, 0f00000000, %p82;
|
|
bra.uni BB0_73;
|
|
|
|
BB0_70:
|
|
setp.geu.f32 %p100, %f1156, 0f00000000;
|
|
@%p100 bra BB0_73;
|
|
|
|
cvt.rzi.f32.f32 %f1026, %f920;
|
|
setp.neu.f32 %p101, %f1026, 0f3EE66666;
|
|
selp.f32 %f1202, 0f7FFFFFFF, %f1202, %p101;
|
|
|
|
BB0_73:
|
|
add.f32 %f1028, %f175, 0f3EE66666;
|
|
mov.b32 %r145, %f1028;
|
|
setp.lt.s32 %p103, %r145, 2139095040;
|
|
@%p103 bra BB0_78;
|
|
|
|
setp.gtu.f32 %p104, %f175, 0f7F800000;
|
|
@%p104 bra BB0_77;
|
|
bra.uni BB0_75;
|
|
|
|
BB0_77:
|
|
add.f32 %f1202, %f1156, 0f3EE66666;
|
|
bra.uni BB0_78;
|
|
|
|
BB0_75:
|
|
setp.neu.f32 %p105, %f175, 0f7F800000;
|
|
@%p105 bra BB0_78;
|
|
|
|
selp.f32 %f1202, 0fFF800000, 0f7F800000, %p6;
|
|
|
|
BB0_78:
|
|
setp.eq.f32 %p106, %f1156, 0f3F800000;
|
|
selp.f32 %f187, 0f3F800000, %f1202, %p106;
|
|
abs.f32 %f188, %f1155;
|
|
setp.lt.f32 %p107, %f188, 0f00800000;
|
|
mul.f32 %f1031, %f188, 0f4B800000;
|
|
selp.f32 %f1032, 0fC3170000, 0fC2FE0000, %p107;
|
|
selp.f32 %f1033, %f1031, %f188, %p107;
|
|
mov.b32 %r146, %f1033;
|
|
and.b32 %r147, %r146, 8388607;
|
|
or.b32 %r148, %r147, 1065353216;
|
|
mov.b32 %f1034, %r148;
|
|
shr.u32 %r149, %r146, 23;
|
|
cvt.rn.f32.u32 %f1035, %r149;
|
|
add.f32 %f1036, %f1032, %f1035;
|
|
setp.gt.f32 %p108, %f1034, 0f3FB504F3;
|
|
mul.f32 %f1037, %f1034, 0f3F000000;
|
|
add.f32 %f1038, %f1036, 0f3F800000;
|
|
selp.f32 %f1039, %f1037, %f1034, %p108;
|
|
selp.f32 %f1040, %f1038, %f1036, %p108;
|
|
add.f32 %f1041, %f1039, 0fBF800000;
|
|
add.f32 %f1030, %f1039, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f1029,%f1030;
|
|
// inline asm
|
|
add.f32 %f1042, %f1041, %f1041;
|
|
mul.f32 %f1043, %f1029, %f1042;
|
|
mul.f32 %f1044, %f1043, %f1043;
|
|
fma.rn.f32 %f1047, %f890, %f1044, %f889;
|
|
fma.rn.f32 %f1049, %f1047, %f1044, %f892;
|
|
mul.rn.f32 %f1050, %f1049, %f1044;
|
|
mul.rn.f32 %f1051, %f1050, %f1043;
|
|
sub.f32 %f1052, %f1041, %f1043;
|
|
neg.f32 %f1053, %f1043;
|
|
add.f32 %f1054, %f1052, %f1052;
|
|
fma.rn.f32 %f1055, %f1053, %f1041, %f1054;
|
|
mul.rn.f32 %f1056, %f1029, %f1055;
|
|
add.f32 %f1057, %f1051, %f1043;
|
|
sub.f32 %f1058, %f1043, %f1057;
|
|
add.f32 %f1059, %f1051, %f1058;
|
|
add.f32 %f1060, %f1056, %f1059;
|
|
add.f32 %f1061, %f1057, %f1060;
|
|
sub.f32 %f1062, %f1057, %f1061;
|
|
add.f32 %f1063, %f1060, %f1062;
|
|
mul.rn.f32 %f1065, %f1040, %f908;
|
|
mul.rn.f32 %f1067, %f1040, %f910;
|
|
add.f32 %f1068, %f1065, %f1061;
|
|
sub.f32 %f1069, %f1065, %f1068;
|
|
add.f32 %f1070, %f1061, %f1069;
|
|
add.f32 %f1071, %f1063, %f1070;
|
|
add.f32 %f1072, %f1067, %f1071;
|
|
add.f32 %f1073, %f1068, %f1072;
|
|
sub.f32 %f1074, %f1068, %f1073;
|
|
add.f32 %f1075, %f1072, %f1074;
|
|
mul.rn.f32 %f1077, %f920, %f1073;
|
|
neg.f32 %f1078, %f1077;
|
|
fma.rn.f32 %f1079, %f920, %f1073, %f1078;
|
|
fma.rn.f32 %f1080, %f920, %f1075, %f1079;
|
|
fma.rn.f32 %f1082, %f925, %f1073, %f1080;
|
|
add.rn.f32 %f1083, %f1077, %f1082;
|
|
neg.f32 %f1084, %f1083;
|
|
add.rn.f32 %f1085, %f1077, %f1084;
|
|
add.rn.f32 %f1086, %f1085, %f1082;
|
|
mov.b32 %r150, %f1083;
|
|
setp.eq.s32 %p109, %r150, 1118925336;
|
|
add.s32 %r151, %r150, -1;
|
|
mov.b32 %f1087, %r151;
|
|
add.f32 %f1088, %f1086, 0f37000000;
|
|
selp.f32 %f1089, %f1087, %f1083, %p109;
|
|
selp.f32 %f189, %f1088, %f1086, %p109;
|
|
mul.f32 %f1090, %f1089, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f1091, %f1090;
|
|
fma.rn.f32 %f1093, %f1091, %f936, %f1089;
|
|
fma.rn.f32 %f1095, %f1091, %f938, %f1093;
|
|
mul.f32 %f1096, %f1095, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f1097, %f1096;
|
|
add.f32 %f1098, %f1091, 0f00000000;
|
|
ex2.approx.f32 %f1099, %f1098;
|
|
mul.f32 %f1100, %f1097, %f1099;
|
|
setp.lt.f32 %p110, %f1089, 0fC2D20000;
|
|
selp.f32 %f1101, 0f00000000, %f1100, %p110;
|
|
setp.gt.f32 %p111, %f1089, 0f42D20000;
|
|
selp.f32 %f1203, 0f7F800000, %f1101, %p111;
|
|
setp.eq.f32 %p112, %f1203, 0f7F800000;
|
|
@%p112 bra BB0_80;
|
|
|
|
fma.rn.f32 %f1203, %f1203, %f189, %f1203;
|
|
|
|
BB0_80:
|
|
setp.lt.f32 %p113, %f1155, 0f00000000;
|
|
and.pred %p7, %p113, %p82;
|
|
mov.b32 %r152, %f1203;
|
|
xor.b32 %r153, %r152, -2147483648;
|
|
mov.b32 %f1102, %r153;
|
|
selp.f32 %f1205, %f1102, %f1203, %p7;
|
|
setp.eq.f32 %p115, %f1155, 0f00000000;
|
|
@%p115 bra BB0_83;
|
|
bra.uni BB0_81;
|
|
|
|
BB0_83:
|
|
add.f32 %f1105, %f1155, %f1155;
|
|
selp.f32 %f1205, %f1105, 0f00000000, %p82;
|
|
bra.uni BB0_84;
|
|
|
|
BB0_81:
|
|
setp.geu.f32 %p116, %f1155, 0f00000000;
|
|
@%p116 bra BB0_84;
|
|
|
|
cvt.rzi.f32.f32 %f1104, %f920;
|
|
setp.neu.f32 %p117, %f1104, 0f3EE66666;
|
|
selp.f32 %f1205, 0f7FFFFFFF, %f1205, %p117;
|
|
|
|
BB0_84:
|
|
add.f32 %f1106, %f188, 0f3EE66666;
|
|
mov.b32 %r154, %f1106;
|
|
setp.lt.s32 %p119, %r154, 2139095040;
|
|
@%p119 bra BB0_89;
|
|
|
|
setp.gtu.f32 %p120, %f188, 0f7F800000;
|
|
@%p120 bra BB0_88;
|
|
bra.uni BB0_86;
|
|
|
|
BB0_88:
|
|
add.f32 %f1205, %f1155, 0f3EE66666;
|
|
bra.uni BB0_89;
|
|
|
|
BB0_86:
|
|
setp.neu.f32 %p121, %f188, 0f7F800000;
|
|
@%p121 bra BB0_89;
|
|
|
|
selp.f32 %f1205, 0fFF800000, 0f7F800000, %p7;
|
|
|
|
BB0_89:
|
|
setp.eq.f32 %p122, %f1155, 0f3F800000;
|
|
selp.f32 %f1107, 0f3F800000, %f1205, %p122;
|
|
cvt.u64.u32 %rd53, %r3;
|
|
cvt.u64.u32 %rd52, %r2;
|
|
mov.u64 %rd56, image;
|
|
cvta.global.u64 %rd51, %rd56;
|
|
// inline asm
|
|
call (%rd50), _rt_buffer_get_64, (%rd51, %r27, %r28, %rd52, %rd53, %rd13, %rd13);
|
|
// inline asm
|
|
cvt.sat.f32.f32 %f1108, %f1107;
|
|
mul.f32 %f1109, %f1108, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r157, %f1109;
|
|
cvt.sat.f32.f32 %f1110, %f187;
|
|
mul.f32 %f1111, %f1110, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r158, %f1111;
|
|
cvt.sat.f32.f32 %f1112, %f174;
|
|
mul.f32 %f1113, %f1112, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r159, %f1113;
|
|
cvt.u16.u32 %rs16, %r157;
|
|
cvt.u16.u32 %rs17, %r159;
|
|
cvt.u16.u32 %rs18, %r158;
|
|
mov.u16 %rs19, 255;
|
|
st.v4.u8 [%rd50], {%rs16, %rs18, %rs17, %rs19};
|
|
ld.global.u32 %r196, [imageEnabled];
|
|
|
|
BB0_90:
|
|
and.b32 %r160, %r196, 4;
|
|
setp.eq.s32 %p123, %r160, 0;
|
|
@%p123 bra BB0_94;
|
|
|
|
ld.global.u32 %r161, [additive];
|
|
setp.eq.s32 %p124, %r161, 0;
|
|
cvt.u64.u32 %rd4, %r2;
|
|
cvt.u64.u32 %rd5, %r3;
|
|
mov.f32 %f1114, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs20, %f1114;}
|
|
|
|
// inline asm
|
|
@%p124 bra BB0_93;
|
|
|
|
mov.u64 %rd69, image_HDR;
|
|
cvta.global.u64 %rd58, %rd69;
|
|
mov.u32 %r165, 8;
|
|
// inline asm
|
|
call (%rd57), _rt_buffer_get_64, (%rd58, %r27, %r165, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
ld.v4.u16 {%rs27, %rs28, %rs29, %rs30}, [%rd57];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1115, %rs27;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1116, %rs28;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1117, %rs29;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd63), _rt_buffer_get_64, (%rd58, %r27, %r165, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
add.f32 %f1118, %f1157, %f1115;
|
|
add.f32 %f1119, %f1156, %f1116;
|
|
add.f32 %f1120, %f1155, %f1117;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs26, %f1120;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs25, %f1119;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs24, %f1118;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd63], {%rs24, %rs25, %rs26, %rs20};
|
|
bra.uni BB0_94;
|
|
|
|
BB0_93:
|
|
mov.u64 %rd76, image_HDR;
|
|
cvta.global.u64 %rd71, %rd76;
|
|
mov.u32 %r167, 8;
|
|
// inline asm
|
|
call (%rd70), _rt_buffer_get_64, (%rd71, %r27, %r167, %rd4, %rd5, %rd13, %rd13);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs33, %f1155;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs32, %f1156;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs31, %f1157;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd70], {%rs31, %rs32, %rs33, %rs20};
|
|
|
|
BB0_94:
|
|
ld.global.u8 %rs34, [imageEnabled];
|
|
and.b16 %rs35, %rs34, 64;
|
|
setp.eq.s16 %p125, %rs35, 0;
|
|
@%p125 bra BB0_106;
|
|
|
|
mul.f32 %f1124, %f19, %f19;
|
|
fma.rn.f32 %f1125, %f20, %f20, %f1124;
|
|
fma.rn.f32 %f1126, %f18, %f18, %f1125;
|
|
sqrt.rn.f32 %f1127, %f1126;
|
|
rcp.rn.f32 %f1128, %f1127;
|
|
mul.f32 %f1129, %f20, %f1128;
|
|
mul.f32 %f1130, %f19, %f1128;
|
|
mul.f32 %f1131, %f18, %f1128;
|
|
cvt.u64.u32 %rd80, %r3;
|
|
cvt.u64.u32 %rd79, %r2;
|
|
mov.u64 %rd83, image_Dir;
|
|
cvta.global.u64 %rd78, %rd83;
|
|
// inline asm
|
|
call (%rd77), _rt_buffer_get_64, (%rd78, %r27, %r28, %rd79, %rd80, %rd13, %rd13);
|
|
// inline asm
|
|
fma.rn.f32 %f1132, %f1129, 0f3F000000, 0f3F000000;
|
|
mul.f32 %f1133, %f1132, 0f437F0000;
|
|
cvt.rzi.u32.f32 %r170, %f1133;
|
|
fma.rn.f32 %f1134, %f1130, 0f3F000000, 0f3F000000;
|
|
mul.f32 %f1135, %f1134, 0f437F0000;
|
|
cvt.rzi.u32.f32 %r171, %f1135;
|
|
fma.rn.f32 %f1136, %f1131, 0f3F000000, 0f3F000000;
|
|
mul.f32 %f1137, %f1136, 0f437F0000;
|
|
cvt.rzi.u32.f32 %r172, %f1137;
|
|
cvt.u16.u32 %rs36, %r172;
|
|
cvt.u16.u32 %rs37, %r171;
|
|
cvt.u16.u32 %rs38, %r170;
|
|
mov.u16 %rs39, 255;
|
|
st.v4.u8 [%rd77], {%rs38, %rs37, %rs36, %rs39};
|
|
|
|
BB0_106:
|
|
ret;
|
|
}
|
|
|
|
|