2443 lines
72 KiB
Plaintext
2443 lines
72 KiB
Plaintext
//
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// Generated by NVIDIA NVVM Compiler
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//
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// Compiler Build ID: CL-23083092
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// Cuda compilation tools, release 9.1, V9.1.85
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// Based on LLVM 3.4svn
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//
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.version 6.1
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.target sm_30
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.address_size 64
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// .globl _Z6oxMainv
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.global .align 8 .b8 pixelID[8];
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.global .align 8 .b8 resolution[8];
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.global .align 4 .b8 normal[12];
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.global .align 4 .b8 camPos[12];
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.global .align 4 .b8 root[4];
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.global .align 4 .u32 imageEnabled;
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.global .texref lightmap;
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.global .align 16 .b8 tileInfo[16];
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.global .align 4 .u32 additive;
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.global .align 1 .b8 image[1];
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.global .align 1 .b8 image_HDR[1];
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.global .align 1 .b8 image_HDR2[1];
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.global .align 1 .b8 image_Mask[1];
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.global .align 1 .b8 image_RNM0[1];
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.global .align 1 .b8 image_RNM1[1];
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.global .align 1 .b8 image_RNM2[1];
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.global .align 1 .b8 uvtangent[1];
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.global .align 1 .b8 uvpos[1];
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.global .align 1 .b8 uvnormal[1];
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.global .align 4 .u32 ignoreNormal;
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.global .align 1 .b8 localLights[1];
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.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 4 .b8 _ZN21rti_internal_typeinfo12ignoreNormalE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
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.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
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.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
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.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
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.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
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.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
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.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
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.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
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.global .align 4 .b8 _ZN21rti_internal_typename12ignoreNormalE[4] = {105, 110, 116, 0};
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.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
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.global .align 4 .u32 _ZN21rti_internal_typeenum12ignoreNormalE = 4919;
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.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
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.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
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.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
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.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
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.global .align 1 .b8 _ZN21rti_internal_semantic12ignoreNormalE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
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.global .align 1 .b8 _ZN23rti_internal_annotation12ignoreNormalE[1];
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.visible .entry _Z6oxMainv(
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)
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{
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.local .align 4 .b8 __local_depot0[4];
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.reg .b64 %SP;
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.reg .b64 %SPL;
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.reg .pred %p<143>;
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.reg .b16 %rs<157>;
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.reg .f32 %f<1498>;
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.reg .b32 %r<258>;
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.reg .b64 %rd<256>;
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mov.u64 %rd255, __local_depot0;
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cvta.local.u64 %SP, %rd255;
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ld.global.v2.u32 {%r35, %r36}, [pixelID];
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cvt.u64.u32 %rd13, %r35;
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cvt.u64.u32 %rd14, %r36;
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mov.u64 %rd17, uvnormal;
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cvta.global.u64 %rd12, %rd17;
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mov.u32 %r33, 2;
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mov.u32 %r34, 4;
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mov.u64 %rd16, 0;
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// inline asm
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call (%rd11), _rt_buffer_get_64, (%rd12, %r33, %r34, %rd13, %rd14, %rd16, %rd16);
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// inline asm
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ld.u32 %r1, [%rd11];
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shr.u32 %r39, %r1, 16;
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cvt.u16.u32 %rs1, %r39;
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and.b16 %rs6, %rs1, 255;
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cvt.u16.u32 %rs7, %r1;
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or.b16 %rs8, %rs7, %rs6;
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setp.eq.s16 %p8, %rs8, 0;
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mov.f32 %f1410, 0f00000000;
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mov.f32 %f1411, %f1410;
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mov.f32 %f1412, %f1410;
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@%p8 bra BB0_2;
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ld.u8 %rs9, [%rd11+1];
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and.b16 %rs11, %rs7, 255;
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cvt.rn.f32.u16 %f266, %rs11;
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div.rn.f32 %f267, %f266, 0f437F0000;
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fma.rn.f32 %f268, %f267, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f269, %rs9;
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div.rn.f32 %f270, %f269, 0f437F0000;
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fma.rn.f32 %f271, %f270, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f272, %rs6;
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div.rn.f32 %f273, %f272, 0f437F0000;
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fma.rn.f32 %f274, %f273, 0f40000000, 0fBF800000;
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mul.f32 %f275, %f271, %f271;
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fma.rn.f32 %f276, %f268, %f268, %f275;
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fma.rn.f32 %f277, %f274, %f274, %f276;
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sqrt.rn.f32 %f278, %f277;
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rcp.rn.f32 %f279, %f278;
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mul.f32 %f1410, %f268, %f279;
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mul.f32 %f1411, %f271, %f279;
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mul.f32 %f1412, %f274, %f279;
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BB0_2:
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ld.global.v2.u32 {%r40, %r41}, [pixelID];
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ld.global.v2.u32 {%r43, %r44}, [tileInfo];
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add.s32 %r2, %r40, %r43;
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add.s32 %r3, %r41, %r44;
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setp.eq.f32 %p9, %f1411, 0f00000000;
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setp.eq.f32 %p10, %f1410, 0f00000000;
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and.pred %p11, %p10, %p9;
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setp.eq.f32 %p12, %f1412, 0f00000000;
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and.pred %p13, %p11, %p12;
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@%p13 bra BB0_107;
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bra.uni BB0_3;
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BB0_107:
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ld.global.u32 %r257, [imageEnabled];
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and.b32 %r213, %r257, 1;
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setp.eq.b32 %p135, %r213, 1;
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@!%p135 bra BB0_109;
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bra.uni BB0_108;
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BB0_108:
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cvt.u64.u32 %rd163, %r2;
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cvt.u64.u32 %rd164, %r3;
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mov.u64 %rd167, image;
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cvta.global.u64 %rd162, %rd167;
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// inline asm
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call (%rd161), _rt_buffer_get_64, (%rd162, %r33, %r34, %rd163, %rd164, %rd16, %rd16);
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// inline asm
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mov.u16 %rs102, 0;
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st.v4.u8 [%rd161], {%rs102, %rs102, %rs102, %rs102};
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ld.global.u32 %r257, [imageEnabled];
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BB0_109:
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and.b32 %r216, %r257, 8;
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setp.eq.s32 %p136, %r216, 0;
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@%p136 bra BB0_111;
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cvt.u64.u32 %rd171, %r3;
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cvt.u64.u32 %rd170, %r2;
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mov.u64 %rd174, image_Mask;
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cvta.global.u64 %rd169, %rd174;
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// inline asm
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call (%rd168), _rt_buffer_get_64, (%rd169, %r33, %r33, %rd170, %rd171, %rd16, %rd16);
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// inline asm
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mov.f32 %f1381, 0f00000000;
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cvt.rzi.u32.f32 %r219, %f1381;
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cvt.u16.u32 %rs103, %r219;
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mov.u16 %rs104, 0;
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st.v2.u8 [%rd168], {%rs103, %rs104};
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ld.global.u32 %r257, [imageEnabled];
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BB0_111:
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cvt.u64.u32 %rd9, %r2;
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cvt.u64.u32 %rd10, %r3;
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and.b32 %r220, %r257, 4;
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setp.eq.s32 %p137, %r220, 0;
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@%p137 bra BB0_115;
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ld.global.u32 %r221, [additive];
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setp.eq.s32 %p138, %r221, 0;
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@%p138 bra BB0_114;
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mov.u64 %rd187, image_HDR;
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cvta.global.u64 %rd176, %rd187;
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mov.u32 %r225, 8;
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// inline asm
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call (%rd175), _rt_buffer_get_64, (%rd176, %r33, %r225, %rd9, %rd10, %rd16, %rd16);
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// inline asm
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ld.v4.u16 {%rs111, %rs112, %rs113, %rs114}, [%rd175];
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// inline asm
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{ cvt.f32.f16 %f1382, %rs111;}
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// inline asm
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// inline asm
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{ cvt.f32.f16 %f1383, %rs112;}
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// inline asm
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// inline asm
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{ cvt.f32.f16 %f1384, %rs113;}
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// inline asm
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// inline asm
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call (%rd181), _rt_buffer_get_64, (%rd176, %r33, %r225, %rd9, %rd10, %rd16, %rd16);
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// inline asm
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add.f32 %f1385, %f1382, 0f00000000;
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add.f32 %f1386, %f1383, 0f00000000;
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add.f32 %f1387, %f1384, 0f00000000;
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// inline asm
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{ cvt.rn.f16.f32 %rs110, %f1387;}
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// inline asm
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// inline asm
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{ cvt.rn.f16.f32 %rs109, %f1386;}
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// inline asm
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// inline asm
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{ cvt.rn.f16.f32 %rs108, %f1385;}
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// inline asm
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mov.u16 %rs115, 0;
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st.v4.u16 [%rd181], {%rs108, %rs109, %rs110, %rs115};
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bra.uni BB0_115;
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BB0_3:
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ld.global.v2.u32 {%r52, %r53}, [pixelID];
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cvt.u64.u32 %rd20, %r52;
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cvt.u64.u32 %rd21, %r53;
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mov.u64 %rd30, uvpos;
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cvta.global.u64 %rd19, %rd30;
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mov.u32 %r49, 12;
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// inline asm
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call (%rd18), _rt_buffer_get_64, (%rd19, %r33, %r49, %rd20, %rd21, %rd16, %rd16);
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// inline asm
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ld.f32 %f9, [%rd18+8];
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ld.f32 %f8, [%rd18+4];
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ld.f32 %f7, [%rd18];
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mul.f32 %f283, %f7, 0f3456BF95;
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mul.f32 %f284, %f8, 0f3456BF95;
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mul.f32 %f285, %f9, 0f3456BF95;
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abs.f32 %f286, %f1410;
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div.rn.f32 %f287, %f283, %f286;
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abs.f32 %f288, %f1411;
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div.rn.f32 %f289, %f284, %f288;
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abs.f32 %f290, %f1412;
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div.rn.f32 %f291, %f285, %f290;
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abs.f32 %f292, %f287;
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abs.f32 %f293, %f289;
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abs.f32 %f294, %f291;
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mov.f32 %f295, 0f38D1B717;
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max.f32 %f296, %f292, %f295;
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max.f32 %f297, %f293, %f295;
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max.f32 %f298, %f294, %f295;
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fma.rn.f32 %f10, %f1410, %f296, %f7;
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fma.rn.f32 %f11, %f1411, %f297, %f8;
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fma.rn.f32 %f12, %f1412, %f298, %f9;
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ld.global.v2.u32 {%r56, %r57}, [pixelID];
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cvt.u64.u32 %rd26, %r56;
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cvt.u64.u32 %rd27, %r57;
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mov.u64 %rd31, uvtangent;
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cvta.global.u64 %rd25, %rd31;
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// inline asm
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call (%rd24), _rt_buffer_get_64, (%rd25, %r33, %r34, %rd26, %rd27, %rd16, %rd16);
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// inline asm
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ld.u32 %r4, [%rd24];
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shr.u32 %r5, %r4, 16;
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cvt.u16.u32 %rs13, %r5;
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and.b16 %rs14, %rs13, 255;
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cvt.u16.u32 %rs15, %r4;
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or.b16 %rs16, %rs15, %rs14;
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setp.eq.s16 %p14, %rs16, 0;
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mov.f32 %f1422, 0f00000000;
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mov.f32 %f1413, %f1422;
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mov.f32 %f1414, %f1422;
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mov.f32 %f1415, %f1422;
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@%p14 bra BB0_5;
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ld.u8 %rs17, [%rd24+1];
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and.b16 %rs19, %rs15, 255;
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cvt.rn.f32.u16 %f299, %rs19;
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div.rn.f32 %f300, %f299, 0f437F0000;
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fma.rn.f32 %f301, %f300, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f302, %rs17;
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div.rn.f32 %f303, %f302, 0f437F0000;
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fma.rn.f32 %f304, %f303, 0f40000000, 0fBF800000;
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cvt.rn.f32.u16 %f305, %rs14;
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div.rn.f32 %f306, %f305, 0f437F0000;
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|
fma.rn.f32 %f307, %f306, 0f40000000, 0fBF800000;
|
|
mul.f32 %f308, %f304, %f304;
|
|
fma.rn.f32 %f309, %f301, %f301, %f308;
|
|
fma.rn.f32 %f310, %f307, %f307, %f309;
|
|
sqrt.rn.f32 %f311, %f310;
|
|
rcp.rn.f32 %f312, %f311;
|
|
mul.f32 %f1413, %f301, %f312;
|
|
mul.f32 %f1414, %f304, %f312;
|
|
mul.f32 %f1415, %f307, %f312;
|
|
|
|
BB0_5:
|
|
mul.f32 %f316, %f1412, %f1414;
|
|
mul.f32 %f317, %f1411, %f1415;
|
|
sub.f32 %f318, %f317, %f316;
|
|
mul.f32 %f319, %f1410, %f1415;
|
|
mul.f32 %f320, %f1412, %f1413;
|
|
sub.f32 %f321, %f320, %f319;
|
|
mul.f32 %f322, %f1411, %f1413;
|
|
mul.f32 %f323, %f1410, %f1414;
|
|
sub.f32 %f324, %f323, %f322;
|
|
setp.lt.u32 %p15, %r4, 16777216;
|
|
selp.f32 %f325, 0fBF800000, 0f3F800000, %p15;
|
|
mul.f32 %f326, %f318, %f325;
|
|
mul.f32 %f327, %f321, %f325;
|
|
mul.f32 %f328, %f324, %f325;
|
|
mul.f32 %f329, %f326, 0f00000000;
|
|
mul.f32 %f330, %f327, 0f00000000;
|
|
mul.f32 %f331, %f328, 0f00000000;
|
|
fma.rn.f32 %f332, %f1413, 0f3F5105EC, %f329;
|
|
fma.rn.f32 %f333, %f1414, 0f3F5105EC, %f330;
|
|
fma.rn.f32 %f334, %f1415, 0f3F5105EC, %f331;
|
|
mul.f32 %f19, %f1410, 0f3F13CD3A;
|
|
add.f32 %f20, %f19, %f332;
|
|
mul.f32 %f21, %f1411, 0f3F13CD3A;
|
|
add.f32 %f22, %f21, %f333;
|
|
mul.f32 %f23, %f1412, 0f3F13CD3A;
|
|
add.f32 %f24, %f23, %f334;
|
|
ld.global.v2.u32 {%r62, %r63}, [pixelID];
|
|
cvt.u64.u32 %rd34, %r62;
|
|
cvt.u64.u32 %rd35, %r63;
|
|
// inline asm
|
|
call (%rd32), _rt_buffer_get_64, (%rd25, %r33, %r34, %rd34, %rd35, %rd16, %rd16);
|
|
// inline asm
|
|
ld.u32 %r6, [%rd32];
|
|
shr.u32 %r7, %r6, 16;
|
|
cvt.u16.u32 %rs22, %r7;
|
|
and.b16 %rs23, %rs22, 255;
|
|
cvt.u16.u32 %rs24, %r6;
|
|
or.b16 %rs25, %rs24, %rs23;
|
|
setp.eq.s16 %p16, %rs25, 0;
|
|
mov.f32 %f1416, %f1422;
|
|
mov.f32 %f1417, %f1422;
|
|
mov.f32 %f1418, %f1422;
|
|
@%p16 bra BB0_7;
|
|
|
|
ld.u8 %rs26, [%rd32+1];
|
|
and.b16 %rs28, %rs24, 255;
|
|
cvt.rn.f32.u16 %f335, %rs28;
|
|
div.rn.f32 %f336, %f335, 0f437F0000;
|
|
fma.rn.f32 %f337, %f336, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f338, %rs26;
|
|
div.rn.f32 %f339, %f338, 0f437F0000;
|
|
fma.rn.f32 %f340, %f339, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f341, %rs23;
|
|
div.rn.f32 %f342, %f341, 0f437F0000;
|
|
fma.rn.f32 %f343, %f342, 0f40000000, 0fBF800000;
|
|
mul.f32 %f344, %f340, %f340;
|
|
fma.rn.f32 %f345, %f337, %f337, %f344;
|
|
fma.rn.f32 %f346, %f343, %f343, %f345;
|
|
sqrt.rn.f32 %f347, %f346;
|
|
rcp.rn.f32 %f348, %f347;
|
|
mul.f32 %f1416, %f337, %f348;
|
|
mul.f32 %f1417, %f340, %f348;
|
|
mul.f32 %f1418, %f343, %f348;
|
|
|
|
BB0_7:
|
|
mul.f32 %f352, %f1412, %f1417;
|
|
mul.f32 %f353, %f1411, %f1418;
|
|
sub.f32 %f354, %f353, %f352;
|
|
mul.f32 %f355, %f1410, %f1418;
|
|
mul.f32 %f356, %f1412, %f1416;
|
|
sub.f32 %f357, %f356, %f355;
|
|
mul.f32 %f358, %f1411, %f1416;
|
|
mul.f32 %f359, %f1410, %f1417;
|
|
sub.f32 %f360, %f359, %f358;
|
|
setp.lt.u32 %p17, %r6, 16777216;
|
|
selp.f32 %f361, 0fBF800000, 0f3F800000, %p17;
|
|
mul.f32 %f362, %f354, %f361;
|
|
mul.f32 %f363, %f357, %f361;
|
|
mul.f32 %f364, %f360, %f361;
|
|
mul.f32 %f365, %f362, 0f3F3504F3;
|
|
mul.f32 %f366, %f363, 0f3F3504F3;
|
|
mul.f32 %f367, %f364, 0f3F3504F3;
|
|
fma.rn.f32 %f368, %f1416, 0fBED105EC, %f365;
|
|
fma.rn.f32 %f369, %f1417, 0fBED105EC, %f366;
|
|
fma.rn.f32 %f370, %f1418, 0fBED105EC, %f367;
|
|
add.f32 %f31, %f19, %f368;
|
|
add.f32 %f32, %f21, %f369;
|
|
add.f32 %f33, %f23, %f370;
|
|
ld.global.v2.u32 {%r68, %r69}, [pixelID];
|
|
cvt.u64.u32 %rd41, %r68;
|
|
cvt.u64.u32 %rd42, %r69;
|
|
// inline asm
|
|
call (%rd39), _rt_buffer_get_64, (%rd25, %r33, %r34, %rd41, %rd42, %rd16, %rd16);
|
|
// inline asm
|
|
ld.u32 %r8, [%rd39];
|
|
shr.u32 %r9, %r8, 16;
|
|
cvt.u16.u32 %rs31, %r9;
|
|
and.b16 %rs32, %rs31, 255;
|
|
cvt.u16.u32 %rs33, %r8;
|
|
or.b16 %rs34, %rs33, %rs32;
|
|
setp.eq.s16 %p18, %rs34, 0;
|
|
mov.f32 %f1419, %f1422;
|
|
mov.f32 %f1420, %f1422;
|
|
mov.f32 %f1421, %f1422;
|
|
@%p18 bra BB0_9;
|
|
|
|
ld.u8 %rs35, [%rd39+1];
|
|
and.b16 %rs37, %rs33, 255;
|
|
cvt.rn.f32.u16 %f371, %rs37;
|
|
div.rn.f32 %f372, %f371, 0f437F0000;
|
|
fma.rn.f32 %f373, %f372, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f374, %rs35;
|
|
div.rn.f32 %f375, %f374, 0f437F0000;
|
|
fma.rn.f32 %f376, %f375, 0f40000000, 0fBF800000;
|
|
cvt.rn.f32.u16 %f377, %rs32;
|
|
div.rn.f32 %f378, %f377, 0f437F0000;
|
|
fma.rn.f32 %f379, %f378, 0f40000000, 0fBF800000;
|
|
mul.f32 %f380, %f376, %f376;
|
|
fma.rn.f32 %f381, %f373, %f373, %f380;
|
|
fma.rn.f32 %f382, %f379, %f379, %f381;
|
|
sqrt.rn.f32 %f383, %f382;
|
|
rcp.rn.f32 %f384, %f383;
|
|
mul.f32 %f1419, %f373, %f384;
|
|
mul.f32 %f1420, %f376, %f384;
|
|
mul.f32 %f1421, %f379, %f384;
|
|
|
|
BB0_9:
|
|
mul.f32 %f398, %f1412, %f1420;
|
|
mul.f32 %f399, %f1411, %f1421;
|
|
sub.f32 %f400, %f399, %f398;
|
|
mul.f32 %f401, %f1410, %f1421;
|
|
mul.f32 %f402, %f1412, %f1419;
|
|
sub.f32 %f403, %f402, %f401;
|
|
mul.f32 %f404, %f1411, %f1419;
|
|
mul.f32 %f405, %f1410, %f1420;
|
|
sub.f32 %f406, %f405, %f404;
|
|
setp.lt.u32 %p19, %r8, 16777216;
|
|
selp.f32 %f407, 0fBF800000, 0f3F800000, %p19;
|
|
mul.f32 %f408, %f400, %f407;
|
|
mul.f32 %f409, %f403, %f407;
|
|
mul.f32 %f410, %f406, %f407;
|
|
mul.f32 %f411, %f408, 0fBF3504F3;
|
|
mul.f32 %f412, %f409, 0fBF3504F3;
|
|
mul.f32 %f413, %f410, 0fBF3504F3;
|
|
fma.rn.f32 %f414, %f1419, 0fBED105EC, %f411;
|
|
fma.rn.f32 %f415, %f1420, 0fBED105EC, %f412;
|
|
fma.rn.f32 %f416, %f1421, 0fBED105EC, %f413;
|
|
add.f32 %f40, %f19, %f414;
|
|
add.f32 %f41, %f21, %f415;
|
|
add.f32 %f42, %f23, %f416;
|
|
mov.u64 %rd51, localLights;
|
|
cvta.global.u64 %rd50, %rd51;
|
|
mov.u32 %r72, 1;
|
|
mov.u32 %r73, 96;
|
|
// inline asm
|
|
call (%rd46, %rd47, %rd48, %rd49), _rt_buffer_get_size_64, (%rd50, %r72, %r73);
|
|
// inline asm
|
|
cvt.u32.u64 %r10, %rd46;
|
|
setp.eq.s32 %p20, %r10, 0;
|
|
mov.f32 %f1423, %f1422;
|
|
mov.f32 %f1424, %f1422;
|
|
mov.f32 %f1425, %f1422;
|
|
mov.f32 %f1426, %f1422;
|
|
mov.f32 %f1427, %f1422;
|
|
mov.f32 %f1428, %f1422;
|
|
mov.f32 %f1429, %f1422;
|
|
mov.f32 %f1430, %f1422;
|
|
mov.f32 %f1431, %f1422;
|
|
mov.f32 %f1432, %f1422;
|
|
mov.f32 %f1433, %f1422;
|
|
mov.f32 %f1434, %f1422;
|
|
@%p20 bra BB0_46;
|
|
|
|
mov.f32 %f430, 0f40000000;
|
|
cvt.rzi.f32.f32 %f431, %f430;
|
|
add.f32 %f432, %f431, %f431;
|
|
mov.f32 %f433, 0f40800000;
|
|
sub.f32 %f434, %f433, %f432;
|
|
abs.f32 %f43, %f434;
|
|
mul.f32 %f44, %f10, 0f3456BF95;
|
|
mul.f32 %f45, %f11, 0f3456BF95;
|
|
mul.f32 %f46, %f12, 0f3456BF95;
|
|
mov.f32 %f429, 0f00000000;
|
|
mov.u32 %r249, 0;
|
|
abs.f32 %f656, %f44;
|
|
abs.f32 %f657, %f45;
|
|
max.f32 %f658, %f656, %f657;
|
|
abs.f32 %f659, %f46;
|
|
max.f32 %f660, %f658, %f659;
|
|
mov.f32 %f1422, %f429;
|
|
mov.f32 %f1423, %f429;
|
|
mov.f32 %f1424, %f429;
|
|
mov.f32 %f1425, %f429;
|
|
mov.f32 %f1426, %f429;
|
|
mov.f32 %f1427, %f429;
|
|
mov.f32 %f1428, %f429;
|
|
mov.f32 %f1429, %f429;
|
|
mov.f32 %f1430, %f429;
|
|
mov.f32 %f1431, %f429;
|
|
mov.f32 %f1432, %f429;
|
|
mov.f32 %f1433, %f429;
|
|
mov.f32 %f1434, %f429;
|
|
|
|
BB0_11:
|
|
cvt.u64.u32 %rd54, %r249;
|
|
// inline asm
|
|
call (%rd52), _rt_buffer_get_64, (%rd50, %r72, %r73, %rd54, %rd16, %rd16, %rd16);
|
|
// inline asm
|
|
ld.v4.f32 {%f437, %f438, %f439, %f440}, [%rd52+80];
|
|
ld.v4.f32 {%f441, %f442, %f443, %f444}, [%rd52+64];
|
|
ld.v4.f32 {%f445, %f446, %f447, %f448}, [%rd52+48];
|
|
ld.v4.f32 {%f1438, %f1439, %f1440, %f452}, [%rd52+32];
|
|
ld.v4.f32 {%f453, %f454, %f455, %f456}, [%rd52+16];
|
|
ld.v4.f32 {%f457, %f458, %f459, %f460}, [%rd52];
|
|
mov.b32 %r12, %f440;
|
|
sub.f32 %f462, %f458, %f7;
|
|
sub.f32 %f463, %f459, %f8;
|
|
sub.f32 %f464, %f460, %f9;
|
|
mul.f32 %f465, %f463, %f463;
|
|
fma.rn.f32 %f466, %f462, %f462, %f465;
|
|
fma.rn.f32 %f467, %f464, %f464, %f466;
|
|
sqrt.rn.f32 %f86, %f467;
|
|
rcp.rn.f32 %f468, %f86;
|
|
mul.f32 %f87, %f462, %f468;
|
|
mul.f32 %f88, %f463, %f468;
|
|
mul.f32 %f89, %f464, %f468;
|
|
mul.f32 %f90, %f86, %f456;
|
|
abs.f32 %f91, %f90;
|
|
setp.lt.f32 %p21, %f91, 0f00800000;
|
|
mul.f32 %f469, %f91, 0f4B800000;
|
|
selp.f32 %f470, 0fC3170000, 0fC2FE0000, %p21;
|
|
selp.f32 %f471, %f469, %f91, %p21;
|
|
mov.b32 %r77, %f471;
|
|
and.b32 %r78, %r77, 8388607;
|
|
or.b32 %r79, %r78, 1065353216;
|
|
mov.b32 %f472, %r79;
|
|
shr.u32 %r80, %r77, 23;
|
|
cvt.rn.f32.u32 %f473, %r80;
|
|
add.f32 %f474, %f470, %f473;
|
|
setp.gt.f32 %p22, %f472, 0f3FB504F3;
|
|
mul.f32 %f475, %f472, 0f3F000000;
|
|
add.f32 %f476, %f474, 0f3F800000;
|
|
selp.f32 %f477, %f475, %f472, %p22;
|
|
selp.f32 %f478, %f476, %f474, %p22;
|
|
add.f32 %f479, %f477, 0fBF800000;
|
|
add.f32 %f436, %f477, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f435,%f436;
|
|
// inline asm
|
|
add.f32 %f480, %f479, %f479;
|
|
mul.f32 %f481, %f435, %f480;
|
|
mul.f32 %f482, %f481, %f481;
|
|
mov.f32 %f483, 0f3C4CAF63;
|
|
mov.f32 %f484, 0f3B18F0FE;
|
|
fma.rn.f32 %f485, %f484, %f482, %f483;
|
|
mov.f32 %f486, 0f3DAAAABD;
|
|
fma.rn.f32 %f487, %f485, %f482, %f486;
|
|
mul.rn.f32 %f488, %f487, %f482;
|
|
mul.rn.f32 %f489, %f488, %f481;
|
|
sub.f32 %f490, %f479, %f481;
|
|
neg.f32 %f491, %f481;
|
|
add.f32 %f492, %f490, %f490;
|
|
fma.rn.f32 %f493, %f491, %f479, %f492;
|
|
mul.rn.f32 %f494, %f435, %f493;
|
|
add.f32 %f495, %f489, %f481;
|
|
sub.f32 %f496, %f481, %f495;
|
|
add.f32 %f497, %f489, %f496;
|
|
add.f32 %f498, %f494, %f497;
|
|
add.f32 %f499, %f495, %f498;
|
|
sub.f32 %f500, %f495, %f499;
|
|
add.f32 %f501, %f498, %f500;
|
|
mov.f32 %f502, 0f3F317200;
|
|
mul.rn.f32 %f503, %f478, %f502;
|
|
mov.f32 %f504, 0f35BFBE8E;
|
|
mul.rn.f32 %f505, %f478, %f504;
|
|
add.f32 %f506, %f503, %f499;
|
|
sub.f32 %f507, %f503, %f506;
|
|
add.f32 %f508, %f499, %f507;
|
|
add.f32 %f509, %f501, %f508;
|
|
add.f32 %f510, %f505, %f509;
|
|
add.f32 %f511, %f506, %f510;
|
|
sub.f32 %f512, %f506, %f511;
|
|
add.f32 %f513, %f510, %f512;
|
|
mul.rn.f32 %f92, %f433, %f511;
|
|
neg.f32 %f515, %f92;
|
|
fma.rn.f32 %f516, %f433, %f511, %f515;
|
|
fma.rn.f32 %f517, %f433, %f513, %f516;
|
|
fma.rn.f32 %f93, %f429, %f511, %f517;
|
|
add.rn.f32 %f94, %f92, %f93;
|
|
mov.b32 %r81, %f94;
|
|
setp.eq.s32 %p1, %r81, 1118925336;
|
|
add.s32 %r82, %r81, -1;
|
|
mov.b32 %f519, %r82;
|
|
selp.f32 %f520, %f519, %f94, %p1;
|
|
mul.f32 %f521, %f520, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f522, %f521;
|
|
mov.f32 %f523, 0fBF317200;
|
|
fma.rn.f32 %f524, %f522, %f523, %f520;
|
|
mov.f32 %f525, 0fB5BFBE8E;
|
|
fma.rn.f32 %f526, %f522, %f525, %f524;
|
|
mul.f32 %f527, %f526, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f528, %f527;
|
|
add.f32 %f529, %f522, 0f00000000;
|
|
ex2.approx.f32 %f530, %f529;
|
|
mul.f32 %f531, %f528, %f530;
|
|
setp.lt.f32 %p23, %f520, 0fC2D20000;
|
|
selp.f32 %f532, 0f00000000, %f531, %p23;
|
|
setp.gt.f32 %p24, %f520, 0f42D20000;
|
|
selp.f32 %f1435, 0f7F800000, %f532, %p24;
|
|
setp.eq.f32 %p25, %f1435, 0f7F800000;
|
|
@%p25 bra BB0_13;
|
|
|
|
neg.f32 %f533, %f94;
|
|
add.rn.f32 %f534, %f92, %f533;
|
|
add.rn.f32 %f535, %f534, %f93;
|
|
add.f32 %f536, %f535, 0f37000000;
|
|
selp.f32 %f537, %f536, %f535, %p1;
|
|
fma.rn.f32 %f1435, %f1435, %f537, %f1435;
|
|
|
|
BB0_13:
|
|
setp.lt.f32 %p26, %f90, 0f00000000;
|
|
setp.eq.f32 %p27, %f43, 0f3F800000;
|
|
and.pred %p2, %p26, %p27;
|
|
mov.b32 %r83, %f1435;
|
|
xor.b32 %r84, %r83, -2147483648;
|
|
mov.b32 %f538, %r84;
|
|
selp.f32 %f1437, %f538, %f1435, %p2;
|
|
setp.eq.f32 %p28, %f90, 0f00000000;
|
|
@%p28 bra BB0_16;
|
|
bra.uni BB0_14;
|
|
|
|
BB0_16:
|
|
add.f32 %f541, %f90, %f90;
|
|
selp.f32 %f1437, %f541, 0f00000000, %p27;
|
|
bra.uni BB0_17;
|
|
|
|
BB0_14:
|
|
setp.geu.f32 %p29, %f90, 0f00000000;
|
|
@%p29 bra BB0_17;
|
|
|
|
cvt.rzi.f32.f32 %f540, %f433;
|
|
setp.neu.f32 %p30, %f540, 0f40800000;
|
|
selp.f32 %f1437, 0f7FFFFFFF, %f1437, %p30;
|
|
|
|
BB0_17:
|
|
add.f32 %f542, %f91, 0f40800000;
|
|
mov.b32 %r85, %f542;
|
|
setp.lt.s32 %p32, %r85, 2139095040;
|
|
@%p32 bra BB0_22;
|
|
|
|
setp.gtu.f32 %p33, %f91, 0f7F800000;
|
|
@%p33 bra BB0_21;
|
|
bra.uni BB0_19;
|
|
|
|
BB0_21:
|
|
add.f32 %f1437, %f90, 0f40800000;
|
|
bra.uni BB0_22;
|
|
|
|
BB0_19:
|
|
setp.neu.f32 %p34, %f91, 0f7F800000;
|
|
@%p34 bra BB0_22;
|
|
|
|
selp.f32 %f1437, 0fFF800000, 0f7F800000, %p2;
|
|
|
|
BB0_22:
|
|
mul.f32 %f543, %f86, %f454;
|
|
mov.f32 %f1459, 0f3F800000;
|
|
sub.f32 %f545, %f1459, %f1437;
|
|
setp.eq.f32 %p35, %f90, 0f3F800000;
|
|
selp.f32 %f546, 0f00000000, %f545, %p35;
|
|
cvt.sat.f32.f32 %f547, %f546;
|
|
fma.rn.f32 %f548, %f543, %f543, %f455;
|
|
div.rn.f32 %f1441, %f547, %f548;
|
|
mul.f32 %f549, %f1411, %f88;
|
|
fma.rn.f32 %f550, %f1410, %f87, %f549;
|
|
fma.rn.f32 %f551, %f1412, %f89, %f550;
|
|
ld.global.u32 %r86, [ignoreNormal];
|
|
setp.eq.s32 %p36, %r86, 0;
|
|
selp.f32 %f552, %f551, 0f3F800000, %p36;
|
|
cvt.sat.f32.f32 %f121, %f552;
|
|
setp.eq.f32 %p37, %f457, 0f3F800000;
|
|
@%p37 bra BB0_28;
|
|
bra.uni BB0_23;
|
|
|
|
BB0_28:
|
|
setp.leu.f32 %p41, %f452, 0f00000000;
|
|
@%p41 bra BB0_30;
|
|
|
|
mul.f32 %f583, %f437, %f87;
|
|
mul.f32 %f584, %f438, %f88;
|
|
neg.f32 %f585, %f584;
|
|
sub.f32 %f586, %f585, %f583;
|
|
mul.f32 %f587, %f439, %f89;
|
|
sub.f32 %f588, %f586, %f587;
|
|
setp.gt.f32 %p42, %f588, 0f00000000;
|
|
selp.f32 %f589, 0f3F800000, 0f00000000, %p42;
|
|
mul.f32 %f590, %f446, %f88;
|
|
fma.rn.f32 %f591, %f445, %f87, %f590;
|
|
mul.f32 %f592, %f442, %f88;
|
|
fma.rn.f32 %f593, %f441, %f87, %f592;
|
|
fma.rn.f32 %f594, %f447, %f89, %f591;
|
|
fma.rn.f32 %f595, %f443, %f89, %f593;
|
|
fma.rn.f32 %f579, %f448, %f594, 0f3F000000;
|
|
fma.rn.f32 %f580, %f448, %f595, 0f3F000000;
|
|
cvt.rzi.s32.f32 %r90, %f452;
|
|
mov.f32 %f582, 0f00000000;
|
|
// inline asm
|
|
call (%f575, %f576, %f577, %f578), _rt_texture_get_f_id, (%r90, %r33, %f579, %f580, %f582, %f582);
|
|
// inline asm
|
|
mul.f32 %f596, %f589, %f575;
|
|
mul.f32 %f597, %f589, %f576;
|
|
mul.f32 %f598, %f589, %f577;
|
|
mul.f32 %f1438, %f1438, %f596;
|
|
mul.f32 %f1439, %f1439, %f597;
|
|
mul.f32 %f1440, %f1440, %f598;
|
|
bra.uni BB0_30;
|
|
|
|
BB0_23:
|
|
setp.eq.f32 %p38, %f457, 0f40000000;
|
|
@%p38 bra BB0_26;
|
|
bra.uni BB0_24;
|
|
|
|
BB0_26:
|
|
setp.leu.f32 %p40, %f452, 0f00000000;
|
|
@%p40 bra BB0_30;
|
|
|
|
mul.f32 %f569, %f446, %f88;
|
|
fma.rn.f32 %f570, %f445, %f87, %f569;
|
|
mul.f32 %f571, %f442, %f88;
|
|
fma.rn.f32 %f572, %f441, %f87, %f571;
|
|
mul.f32 %f573, %f438, %f88;
|
|
fma.rn.f32 %f574, %f437, %f87, %f573;
|
|
fma.rn.f32 %f566, %f447, %f89, %f570;
|
|
fma.rn.f32 %f567, %f443, %f89, %f572;
|
|
fma.rn.f32 %f568, %f439, %f89, %f574;
|
|
cvt.rzi.s32.f32 %r87, %f452;
|
|
mov.u32 %r88, 6;
|
|
mov.u32 %r89, 0;
|
|
// inline asm
|
|
call (%f562, %f563, %f564, %f565), _rt_texture_get_base_id, (%r87, %r88, %f566, %f567, %f568, %r89);
|
|
// inline asm
|
|
mul.f32 %f1438, %f1438, %f562;
|
|
mul.f32 %f1439, %f1439, %f563;
|
|
mul.f32 %f1440, %f1440, %f564;
|
|
bra.uni BB0_30;
|
|
|
|
BB0_24:
|
|
setp.neu.f32 %p39, %f457, 0f40800000;
|
|
@%p39 bra BB0_30;
|
|
|
|
mul.f32 %f553, %f437, %f87;
|
|
mul.f32 %f554, %f438, %f88;
|
|
neg.f32 %f555, %f554;
|
|
sub.f32 %f556, %f555, %f553;
|
|
mul.f32 %f557, %f439, %f89;
|
|
sub.f32 %f558, %f556, %f557;
|
|
fma.rn.f32 %f559, %f452, %f558, %f448;
|
|
cvt.sat.f32.f32 %f560, %f559;
|
|
mul.f32 %f561, %f560, %f560;
|
|
mul.f32 %f1441, %f1441, %f561;
|
|
|
|
BB0_30:
|
|
max.f32 %f611, %f1438, %f1439;
|
|
max.f32 %f612, %f611, %f1440;
|
|
mul.f32 %f133, %f121, %f1441;
|
|
mul.f32 %f613, %f133, %f612;
|
|
setp.lt.f32 %p44, %f613, 0f3727C5AC;
|
|
mov.pred %p142, -1;
|
|
mov.f32 %f1442, 0f00000000;
|
|
mov.f32 %f1443, %f1442;
|
|
mov.f32 %f1444, %f1442;
|
|
mov.f32 %f1445, %f1442;
|
|
mov.f32 %f1446, %f1442;
|
|
mov.f32 %f1447, %f1442;
|
|
mov.f32 %f1448, %f1442;
|
|
mov.f32 %f1449, %f1442;
|
|
mov.f32 %f1450, %f1442;
|
|
mov.f32 %f1451, %f1442;
|
|
mov.f32 %f1452, %f1442;
|
|
mov.f32 %f1453, %f1442;
|
|
@%p44 bra BB0_32;
|
|
|
|
mul.f32 %f1442, %f1438, %f133;
|
|
mul.f32 %f614, %f22, %f88;
|
|
fma.rn.f32 %f615, %f20, %f87, %f614;
|
|
fma.rn.f32 %f616, %f24, %f89, %f615;
|
|
cvt.sat.f32.f32 %f617, %f616;
|
|
mul.f32 %f618, %f1438, %f1441;
|
|
mul.f32 %f619, %f618, %f617;
|
|
mul.f32 %f620, %f1439, %f1441;
|
|
mul.f32 %f621, %f620, %f617;
|
|
mul.f32 %f622, %f1440, %f1441;
|
|
mul.f32 %f623, %f622, %f617;
|
|
mul.f32 %f624, %f32, %f88;
|
|
fma.rn.f32 %f625, %f31, %f87, %f624;
|
|
fma.rn.f32 %f626, %f33, %f89, %f625;
|
|
cvt.sat.f32.f32 %f627, %f626;
|
|
mul.f32 %f628, %f618, %f627;
|
|
mul.f32 %f629, %f620, %f627;
|
|
mul.f32 %f630, %f622, %f627;
|
|
mul.f32 %f631, %f41, %f88;
|
|
fma.rn.f32 %f632, %f40, %f87, %f631;
|
|
fma.rn.f32 %f633, %f42, %f89, %f632;
|
|
cvt.sat.f32.f32 %f634, %f633;
|
|
mul.f32 %f635, %f618, %f634;
|
|
mul.f32 %f636, %f620, %f634;
|
|
mul.f32 %f637, %f622, %f634;
|
|
add.f32 %f638, %f619, %f628;
|
|
add.f32 %f639, %f621, %f629;
|
|
add.f32 %f640, %f623, %f630;
|
|
add.f32 %f641, %f638, %f635;
|
|
add.f32 %f642, %f639, %f636;
|
|
add.f32 %f643, %f640, %f637;
|
|
mul.f32 %f644, %f641, 0f3F13CD3A;
|
|
mul.f32 %f645, %f642, 0f3F13CD3A;
|
|
mul.f32 %f646, %f643, 0f3F13CD3A;
|
|
div.rn.f32 %f647, %f1442, %f644;
|
|
mul.f32 %f1443, %f1439, %f133;
|
|
div.rn.f32 %f648, %f1443, %f645;
|
|
mul.f32 %f1444, %f1440, %f133;
|
|
div.rn.f32 %f649, %f1444, %f646;
|
|
setp.eq.f32 %p46, %f1442, 0f00000000;
|
|
selp.f32 %f650, 0f00000000, %f647, %p46;
|
|
setp.eq.f32 %p47, %f1443, 0f00000000;
|
|
selp.f32 %f651, 0f00000000, %f648, %p47;
|
|
setp.eq.f32 %p48, %f1444, 0f00000000;
|
|
selp.f32 %f652, 0f00000000, %f649, %p48;
|
|
mul.f32 %f1445, %f619, %f650;
|
|
mul.f32 %f1446, %f621, %f651;
|
|
mul.f32 %f1447, %f623, %f652;
|
|
mul.f32 %f1448, %f628, %f650;
|
|
mul.f32 %f1449, %f629, %f651;
|
|
mul.f32 %f1450, %f630, %f652;
|
|
mul.f32 %f1451, %f635, %f650;
|
|
mul.f32 %f1452, %f636, %f651;
|
|
mul.f32 %f1453, %f637, %f652;
|
|
mov.pred %p142, 0;
|
|
|
|
BB0_32:
|
|
@%p142 bra BB0_45;
|
|
|
|
setp.eq.s32 %p49, %r12, 0;
|
|
@%p49 bra BB0_44;
|
|
|
|
mov.f32 %f1458, 0f00000000;
|
|
setp.lt.s32 %p50, %r12, 1;
|
|
@%p50 bra BB0_43;
|
|
|
|
max.f32 %f159, %f660, %f295;
|
|
and.b32 %r14, %r12, 3;
|
|
setp.eq.s32 %p51, %r14, 0;
|
|
add.u64 %rd59, %SP, 0;
|
|
cvta.to.local.u64 %rd5, %rd59;
|
|
mov.f32 %f1458, 0f00000000;
|
|
mov.u32 %r253, 0;
|
|
@%p51 bra BB0_41;
|
|
|
|
setp.eq.s32 %p52, %r14, 1;
|
|
mov.f32 %f1455, 0f00000000;
|
|
mov.u32 %r251, 0;
|
|
@%p52 bra BB0_40;
|
|
|
|
setp.eq.s32 %p53, %r14, 2;
|
|
mov.f32 %f1454, 0f00000000;
|
|
mov.u32 %r250, 0;
|
|
@%p53 bra BB0_39;
|
|
|
|
sub.f32 %f672, %f458, %f453;
|
|
sub.f32 %f673, %f459, %f453;
|
|
sub.f32 %f674, %f460, %f453;
|
|
sub.f32 %f675, %f672, %f7;
|
|
sub.f32 %f676, %f673, %f8;
|
|
sub.f32 %f677, %f674, %f9;
|
|
mul.f32 %f678, %f676, %f676;
|
|
fma.rn.f32 %f679, %f675, %f675, %f678;
|
|
fma.rn.f32 %f680, %f677, %f677, %f679;
|
|
sqrt.rn.f32 %f671, %f680;
|
|
rcp.rn.f32 %f681, %f671;
|
|
mul.f32 %f667, %f681, %f675;
|
|
mul.f32 %f668, %f681, %f676;
|
|
mul.f32 %f669, %f681, %f677;
|
|
ld.global.u32 %r99, [imageEnabled];
|
|
and.b32 %r100, %r99, 32;
|
|
setp.eq.s32 %p54, %r100, 0;
|
|
selp.f32 %f682, 0f3F800000, 0f41200000, %p54;
|
|
mul.f32 %f670, %f682, %f159;
|
|
mov.u32 %r101, 1065353216;
|
|
st.local.u32 [%rd5], %r101;
|
|
ld.global.u32 %r95, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r95, %f10, %f11, %f12, %f667, %f668, %f669, %r72, %f670, %f671, %rd59, %r34);
|
|
// inline asm
|
|
ld.local.f32 %f683, [%rd5];
|
|
add.f32 %f1454, %f683, 0f00000000;
|
|
mov.u32 %r250, %r72;
|
|
|
|
BB0_39:
|
|
cvt.rn.f32.s32 %f692, %r250;
|
|
mul.f32 %f693, %f692, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f694, %f693;
|
|
sub.f32 %f695, %f693, %f694;
|
|
mul.f32 %f696, %f692, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f697, %f696;
|
|
sub.f32 %f698, %f696, %f697;
|
|
mul.f32 %f699, %f692, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f700, %f699;
|
|
sub.f32 %f701, %f699, %f700;
|
|
add.f32 %f702, %f698, 0f4199851F;
|
|
add.f32 %f703, %f701, 0f4199851F;
|
|
add.f32 %f704, %f695, 0f4199851F;
|
|
mul.f32 %f705, %f698, %f703;
|
|
fma.rn.f32 %f706, %f695, %f702, %f705;
|
|
fma.rn.f32 %f707, %f704, %f701, %f706;
|
|
add.f32 %f708, %f695, %f707;
|
|
add.f32 %f709, %f698, %f707;
|
|
add.f32 %f710, %f701, %f707;
|
|
add.f32 %f711, %f708, %f709;
|
|
mul.f32 %f712, %f710, %f711;
|
|
cvt.rmi.f32.f32 %f713, %f712;
|
|
sub.f32 %f714, %f712, %f713;
|
|
add.f32 %f715, %f708, %f710;
|
|
mul.f32 %f716, %f709, %f715;
|
|
cvt.rmi.f32.f32 %f717, %f716;
|
|
sub.f32 %f718, %f716, %f717;
|
|
add.f32 %f719, %f709, %f710;
|
|
mul.f32 %f720, %f708, %f719;
|
|
cvt.rmi.f32.f32 %f721, %f720;
|
|
sub.f32 %f722, %f720, %f721;
|
|
fma.rn.f32 %f723, %f714, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f724, %f718, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f725, %f722, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f726, %f453, %f723, %f458;
|
|
fma.rn.f32 %f727, %f453, %f724, %f459;
|
|
fma.rn.f32 %f728, %f453, %f725, %f460;
|
|
sub.f32 %f729, %f726, %f7;
|
|
sub.f32 %f730, %f727, %f8;
|
|
sub.f32 %f731, %f728, %f9;
|
|
mul.f32 %f732, %f730, %f730;
|
|
fma.rn.f32 %f733, %f729, %f729, %f732;
|
|
fma.rn.f32 %f734, %f731, %f731, %f733;
|
|
sqrt.rn.f32 %f691, %f734;
|
|
rcp.rn.f32 %f735, %f691;
|
|
mul.f32 %f687, %f735, %f729;
|
|
mul.f32 %f688, %f735, %f730;
|
|
mul.f32 %f689, %f735, %f731;
|
|
ld.global.u32 %r105, [imageEnabled];
|
|
and.b32 %r106, %r105, 32;
|
|
setp.eq.s32 %p55, %r106, 0;
|
|
selp.f32 %f736, 0f3F800000, 0f41200000, %p55;
|
|
mul.f32 %f690, %f736, %f159;
|
|
mov.u32 %r107, 1065353216;
|
|
st.local.u32 [%rd5], %r107;
|
|
ld.global.u32 %r102, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r102, %f10, %f11, %f12, %f687, %f688, %f689, %r72, %f690, %f691, %rd59, %r34);
|
|
// inline asm
|
|
ld.local.f32 %f737, [%rd5];
|
|
add.f32 %f1455, %f1454, %f737;
|
|
add.s32 %r251, %r250, 1;
|
|
|
|
BB0_40:
|
|
cvt.rn.f32.s32 %f746, %r251;
|
|
mul.f32 %f747, %f746, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f748, %f747;
|
|
sub.f32 %f749, %f747, %f748;
|
|
mul.f32 %f750, %f746, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f751, %f750;
|
|
sub.f32 %f752, %f750, %f751;
|
|
mul.f32 %f753, %f746, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f754, %f753;
|
|
sub.f32 %f755, %f753, %f754;
|
|
add.f32 %f756, %f752, 0f4199851F;
|
|
add.f32 %f757, %f755, 0f4199851F;
|
|
add.f32 %f758, %f749, 0f4199851F;
|
|
mul.f32 %f759, %f752, %f757;
|
|
fma.rn.f32 %f760, %f749, %f756, %f759;
|
|
fma.rn.f32 %f761, %f758, %f755, %f760;
|
|
add.f32 %f762, %f749, %f761;
|
|
add.f32 %f763, %f752, %f761;
|
|
add.f32 %f764, %f755, %f761;
|
|
add.f32 %f765, %f762, %f763;
|
|
mul.f32 %f766, %f764, %f765;
|
|
cvt.rmi.f32.f32 %f767, %f766;
|
|
sub.f32 %f768, %f766, %f767;
|
|
add.f32 %f769, %f762, %f764;
|
|
mul.f32 %f770, %f763, %f769;
|
|
cvt.rmi.f32.f32 %f771, %f770;
|
|
sub.f32 %f772, %f770, %f771;
|
|
add.f32 %f773, %f763, %f764;
|
|
mul.f32 %f774, %f762, %f773;
|
|
cvt.rmi.f32.f32 %f775, %f774;
|
|
sub.f32 %f776, %f774, %f775;
|
|
fma.rn.f32 %f777, %f768, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f778, %f772, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f779, %f776, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f780, %f453, %f777, %f458;
|
|
fma.rn.f32 %f781, %f453, %f778, %f459;
|
|
fma.rn.f32 %f782, %f453, %f779, %f460;
|
|
sub.f32 %f783, %f780, %f7;
|
|
sub.f32 %f784, %f781, %f8;
|
|
sub.f32 %f785, %f782, %f9;
|
|
mul.f32 %f786, %f784, %f784;
|
|
fma.rn.f32 %f787, %f783, %f783, %f786;
|
|
fma.rn.f32 %f788, %f785, %f785, %f787;
|
|
sqrt.rn.f32 %f745, %f788;
|
|
rcp.rn.f32 %f789, %f745;
|
|
mul.f32 %f741, %f789, %f783;
|
|
mul.f32 %f742, %f789, %f784;
|
|
mul.f32 %f743, %f789, %f785;
|
|
ld.global.u32 %r111, [imageEnabled];
|
|
and.b32 %r112, %r111, 32;
|
|
setp.eq.s32 %p56, %r112, 0;
|
|
selp.f32 %f790, 0f3F800000, 0f41200000, %p56;
|
|
mul.f32 %f744, %f790, %f159;
|
|
mov.u32 %r113, 1065353216;
|
|
st.local.u32 [%rd5], %r113;
|
|
ld.global.u32 %r108, [root];
|
|
mov.u32 %r109, 1;
|
|
// inline asm
|
|
call _rt_trace_64, (%r108, %f10, %f11, %f12, %f741, %f742, %f743, %r109, %f744, %f745, %rd59, %r34);
|
|
// inline asm
|
|
ld.local.f32 %f791, [%rd5];
|
|
add.f32 %f1458, %f1455, %f791;
|
|
add.s32 %r253, %r251, 1;
|
|
|
|
BB0_41:
|
|
setp.lt.u32 %p57, %r12, 4;
|
|
@%p57 bra BB0_43;
|
|
|
|
BB0_42:
|
|
cvt.rn.f32.s32 %f824, %r253;
|
|
mul.f32 %f825, %f824, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f826, %f825;
|
|
sub.f32 %f827, %f825, %f826;
|
|
mul.f32 %f828, %f824, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f829, %f828;
|
|
sub.f32 %f830, %f828, %f829;
|
|
mul.f32 %f831, %f824, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f832, %f831;
|
|
sub.f32 %f833, %f831, %f832;
|
|
add.f32 %f834, %f830, 0f4199851F;
|
|
add.f32 %f835, %f833, 0f4199851F;
|
|
add.f32 %f836, %f827, 0f4199851F;
|
|
mul.f32 %f837, %f830, %f835;
|
|
fma.rn.f32 %f838, %f827, %f834, %f837;
|
|
fma.rn.f32 %f839, %f836, %f833, %f838;
|
|
add.f32 %f840, %f827, %f839;
|
|
add.f32 %f841, %f830, %f839;
|
|
add.f32 %f842, %f833, %f839;
|
|
add.f32 %f843, %f840, %f841;
|
|
mul.f32 %f844, %f842, %f843;
|
|
cvt.rmi.f32.f32 %f845, %f844;
|
|
sub.f32 %f846, %f844, %f845;
|
|
add.f32 %f847, %f840, %f842;
|
|
mul.f32 %f848, %f841, %f847;
|
|
cvt.rmi.f32.f32 %f849, %f848;
|
|
sub.f32 %f850, %f848, %f849;
|
|
add.f32 %f851, %f841, %f842;
|
|
mul.f32 %f852, %f840, %f851;
|
|
cvt.rmi.f32.f32 %f853, %f852;
|
|
sub.f32 %f854, %f852, %f853;
|
|
fma.rn.f32 %f855, %f846, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f856, %f850, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f857, %f854, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f858, %f453, %f855, %f458;
|
|
fma.rn.f32 %f859, %f453, %f856, %f459;
|
|
fma.rn.f32 %f860, %f453, %f857, %f460;
|
|
sub.f32 %f861, %f858, %f7;
|
|
sub.f32 %f862, %f859, %f8;
|
|
sub.f32 %f863, %f860, %f9;
|
|
mul.f32 %f864, %f862, %f862;
|
|
fma.rn.f32 %f865, %f861, %f861, %f864;
|
|
fma.rn.f32 %f866, %f863, %f863, %f865;
|
|
sqrt.rn.f32 %f799, %f866;
|
|
rcp.rn.f32 %f867, %f799;
|
|
mul.f32 %f795, %f867, %f861;
|
|
mul.f32 %f796, %f867, %f862;
|
|
mul.f32 %f797, %f867, %f863;
|
|
ld.global.u32 %r126, [imageEnabled];
|
|
and.b32 %r127, %r126, 32;
|
|
setp.eq.s32 %p58, %r127, 0;
|
|
selp.f32 %f868, 0f3F800000, 0f41200000, %p58;
|
|
mul.f32 %f798, %f868, %f159;
|
|
mov.u32 %r128, 1065353216;
|
|
st.local.u32 [%rd5], %r128;
|
|
ld.global.u32 %r114, [root];
|
|
mov.u32 %r124, 1;
|
|
// inline asm
|
|
call _rt_trace_64, (%r114, %f10, %f11, %f12, %f795, %f796, %f797, %r124, %f798, %f799, %rd59, %r34);
|
|
// inline asm
|
|
ld.local.f32 %f869, [%rd5];
|
|
add.f32 %f870, %f1458, %f869;
|
|
add.s32 %r129, %r253, 1;
|
|
cvt.rn.f32.s32 %f871, %r129;
|
|
mul.f32 %f872, %f871, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f873, %f872;
|
|
sub.f32 %f874, %f872, %f873;
|
|
mul.f32 %f875, %f871, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f876, %f875;
|
|
sub.f32 %f877, %f875, %f876;
|
|
mul.f32 %f878, %f871, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f879, %f878;
|
|
sub.f32 %f880, %f878, %f879;
|
|
add.f32 %f881, %f877, 0f4199851F;
|
|
add.f32 %f882, %f880, 0f4199851F;
|
|
add.f32 %f883, %f874, 0f4199851F;
|
|
mul.f32 %f884, %f877, %f882;
|
|
fma.rn.f32 %f885, %f874, %f881, %f884;
|
|
fma.rn.f32 %f886, %f883, %f880, %f885;
|
|
add.f32 %f887, %f874, %f886;
|
|
add.f32 %f888, %f877, %f886;
|
|
add.f32 %f889, %f880, %f886;
|
|
add.f32 %f890, %f887, %f888;
|
|
mul.f32 %f891, %f889, %f890;
|
|
cvt.rmi.f32.f32 %f892, %f891;
|
|
sub.f32 %f893, %f891, %f892;
|
|
add.f32 %f894, %f887, %f889;
|
|
mul.f32 %f895, %f888, %f894;
|
|
cvt.rmi.f32.f32 %f896, %f895;
|
|
sub.f32 %f897, %f895, %f896;
|
|
add.f32 %f898, %f888, %f889;
|
|
mul.f32 %f899, %f887, %f898;
|
|
cvt.rmi.f32.f32 %f900, %f899;
|
|
sub.f32 %f901, %f899, %f900;
|
|
fma.rn.f32 %f902, %f893, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f903, %f897, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f904, %f901, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f905, %f453, %f902, %f458;
|
|
fma.rn.f32 %f906, %f453, %f903, %f459;
|
|
fma.rn.f32 %f907, %f453, %f904, %f460;
|
|
sub.f32 %f908, %f905, %f7;
|
|
sub.f32 %f909, %f906, %f8;
|
|
sub.f32 %f910, %f907, %f9;
|
|
mul.f32 %f911, %f909, %f909;
|
|
fma.rn.f32 %f912, %f908, %f908, %f911;
|
|
fma.rn.f32 %f913, %f910, %f910, %f912;
|
|
sqrt.rn.f32 %f807, %f913;
|
|
rcp.rn.f32 %f914, %f807;
|
|
mul.f32 %f803, %f914, %f908;
|
|
mul.f32 %f804, %f914, %f909;
|
|
mul.f32 %f805, %f914, %f910;
|
|
ld.global.u32 %r130, [imageEnabled];
|
|
and.b32 %r131, %r130, 32;
|
|
setp.eq.s32 %p59, %r131, 0;
|
|
selp.f32 %f915, 0f3F800000, 0f41200000, %p59;
|
|
mul.f32 %f806, %f915, %f159;
|
|
st.local.u32 [%rd5], %r128;
|
|
ld.global.u32 %r117, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r117, %f10, %f11, %f12, %f803, %f804, %f805, %r124, %f806, %f807, %rd59, %r34);
|
|
// inline asm
|
|
ld.local.f32 %f916, [%rd5];
|
|
add.f32 %f917, %f870, %f916;
|
|
add.s32 %r132, %r253, 2;
|
|
cvt.rn.f32.s32 %f918, %r132;
|
|
mul.f32 %f919, %f918, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f920, %f919;
|
|
sub.f32 %f921, %f919, %f920;
|
|
mul.f32 %f922, %f918, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f923, %f922;
|
|
sub.f32 %f924, %f922, %f923;
|
|
mul.f32 %f925, %f918, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f926, %f925;
|
|
sub.f32 %f927, %f925, %f926;
|
|
add.f32 %f928, %f924, 0f4199851F;
|
|
add.f32 %f929, %f927, 0f4199851F;
|
|
add.f32 %f930, %f921, 0f4199851F;
|
|
mul.f32 %f931, %f924, %f929;
|
|
fma.rn.f32 %f932, %f921, %f928, %f931;
|
|
fma.rn.f32 %f933, %f930, %f927, %f932;
|
|
add.f32 %f934, %f921, %f933;
|
|
add.f32 %f935, %f924, %f933;
|
|
add.f32 %f936, %f927, %f933;
|
|
add.f32 %f937, %f934, %f935;
|
|
mul.f32 %f938, %f936, %f937;
|
|
cvt.rmi.f32.f32 %f939, %f938;
|
|
sub.f32 %f940, %f938, %f939;
|
|
add.f32 %f941, %f934, %f936;
|
|
mul.f32 %f942, %f935, %f941;
|
|
cvt.rmi.f32.f32 %f943, %f942;
|
|
sub.f32 %f944, %f942, %f943;
|
|
add.f32 %f945, %f935, %f936;
|
|
mul.f32 %f946, %f934, %f945;
|
|
cvt.rmi.f32.f32 %f947, %f946;
|
|
sub.f32 %f948, %f946, %f947;
|
|
fma.rn.f32 %f949, %f940, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f950, %f944, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f951, %f948, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f952, %f453, %f949, %f458;
|
|
fma.rn.f32 %f953, %f453, %f950, %f459;
|
|
fma.rn.f32 %f954, %f453, %f951, %f460;
|
|
sub.f32 %f955, %f952, %f7;
|
|
sub.f32 %f956, %f953, %f8;
|
|
sub.f32 %f957, %f954, %f9;
|
|
mul.f32 %f958, %f956, %f956;
|
|
fma.rn.f32 %f959, %f955, %f955, %f958;
|
|
fma.rn.f32 %f960, %f957, %f957, %f959;
|
|
sqrt.rn.f32 %f815, %f960;
|
|
rcp.rn.f32 %f961, %f815;
|
|
mul.f32 %f811, %f961, %f955;
|
|
mul.f32 %f812, %f961, %f956;
|
|
mul.f32 %f813, %f961, %f957;
|
|
ld.global.u32 %r133, [imageEnabled];
|
|
and.b32 %r134, %r133, 32;
|
|
setp.eq.s32 %p60, %r134, 0;
|
|
selp.f32 %f962, 0f3F800000, 0f41200000, %p60;
|
|
mul.f32 %f814, %f962, %f159;
|
|
st.local.u32 [%rd5], %r128;
|
|
ld.global.u32 %r120, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r120, %f10, %f11, %f12, %f811, %f812, %f813, %r124, %f814, %f815, %rd59, %r34);
|
|
// inline asm
|
|
ld.local.f32 %f963, [%rd5];
|
|
add.f32 %f964, %f917, %f963;
|
|
add.s32 %r135, %r253, 3;
|
|
cvt.rn.f32.s32 %f965, %r135;
|
|
mul.f32 %f966, %f965, 0f3DD32618;
|
|
cvt.rmi.f32.f32 %f967, %f966;
|
|
sub.f32 %f968, %f966, %f967;
|
|
mul.f32 %f969, %f965, 0f3DD2F1AA;
|
|
cvt.rmi.f32.f32 %f970, %f969;
|
|
sub.f32 %f971, %f969, %f970;
|
|
mul.f32 %f972, %f965, 0f3DC74539;
|
|
cvt.rmi.f32.f32 %f973, %f972;
|
|
sub.f32 %f974, %f972, %f973;
|
|
add.f32 %f975, %f971, 0f4199851F;
|
|
add.f32 %f976, %f974, 0f4199851F;
|
|
add.f32 %f977, %f968, 0f4199851F;
|
|
mul.f32 %f978, %f971, %f976;
|
|
fma.rn.f32 %f979, %f968, %f975, %f978;
|
|
fma.rn.f32 %f980, %f977, %f974, %f979;
|
|
add.f32 %f981, %f968, %f980;
|
|
add.f32 %f982, %f971, %f980;
|
|
add.f32 %f983, %f974, %f980;
|
|
add.f32 %f984, %f981, %f982;
|
|
mul.f32 %f985, %f983, %f984;
|
|
cvt.rmi.f32.f32 %f986, %f985;
|
|
sub.f32 %f987, %f985, %f986;
|
|
add.f32 %f988, %f981, %f983;
|
|
mul.f32 %f989, %f982, %f988;
|
|
cvt.rmi.f32.f32 %f990, %f989;
|
|
sub.f32 %f991, %f989, %f990;
|
|
add.f32 %f992, %f982, %f983;
|
|
mul.f32 %f993, %f981, %f992;
|
|
cvt.rmi.f32.f32 %f994, %f993;
|
|
sub.f32 %f995, %f993, %f994;
|
|
fma.rn.f32 %f996, %f987, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f997, %f991, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f998, %f995, 0f40000000, 0fBF800000;
|
|
fma.rn.f32 %f999, %f453, %f996, %f458;
|
|
fma.rn.f32 %f1000, %f453, %f997, %f459;
|
|
fma.rn.f32 %f1001, %f453, %f998, %f460;
|
|
sub.f32 %f1002, %f999, %f7;
|
|
sub.f32 %f1003, %f1000, %f8;
|
|
sub.f32 %f1004, %f1001, %f9;
|
|
mul.f32 %f1005, %f1003, %f1003;
|
|
fma.rn.f32 %f1006, %f1002, %f1002, %f1005;
|
|
fma.rn.f32 %f1007, %f1004, %f1004, %f1006;
|
|
sqrt.rn.f32 %f823, %f1007;
|
|
rcp.rn.f32 %f1008, %f823;
|
|
mul.f32 %f819, %f1008, %f1002;
|
|
mul.f32 %f820, %f1008, %f1003;
|
|
mul.f32 %f821, %f1008, %f1004;
|
|
ld.global.u32 %r136, [imageEnabled];
|
|
and.b32 %r137, %r136, 32;
|
|
setp.eq.s32 %p61, %r137, 0;
|
|
selp.f32 %f1009, 0f3F800000, 0f41200000, %p61;
|
|
mul.f32 %f822, %f1009, %f159;
|
|
st.local.u32 [%rd5], %r128;
|
|
ld.global.u32 %r123, [root];
|
|
// inline asm
|
|
call _rt_trace_64, (%r123, %f10, %f11, %f12, %f819, %f820, %f821, %r124, %f822, %f823, %rd59, %r34);
|
|
// inline asm
|
|
ld.local.f32 %f1010, [%rd5];
|
|
add.f32 %f1458, %f964, %f1010;
|
|
add.s32 %r253, %r253, 4;
|
|
setp.lt.s32 %p62, %r253, %r12;
|
|
@%p62 bra BB0_42;
|
|
|
|
BB0_43:
|
|
cvt.rn.f32.s32 %f1011, %r12;
|
|
div.rn.f32 %f1459, %f1458, %f1011;
|
|
|
|
BB0_44:
|
|
fma.rn.f32 %f1434, %f1442, %f1459, %f1434;
|
|
fma.rn.f32 %f1433, %f1443, %f1459, %f1433;
|
|
fma.rn.f32 %f1432, %f1444, %f1459, %f1432;
|
|
fma.rn.f32 %f1431, %f1445, %f1459, %f1431;
|
|
fma.rn.f32 %f1430, %f1446, %f1459, %f1430;
|
|
fma.rn.f32 %f1429, %f1447, %f1459, %f1429;
|
|
fma.rn.f32 %f1428, %f1448, %f1459, %f1428;
|
|
fma.rn.f32 %f1427, %f1449, %f1459, %f1427;
|
|
fma.rn.f32 %f1426, %f1450, %f1459, %f1426;
|
|
fma.rn.f32 %f1425, %f1451, %f1459, %f1425;
|
|
fma.rn.f32 %f1424, %f1452, %f1459, %f1424;
|
|
fma.rn.f32 %f1423, %f1453, %f1459, %f1423;
|
|
add.f32 %f1422, %f1422, %f1459;
|
|
|
|
BB0_45:
|
|
add.s32 %r249, %r249, 1;
|
|
setp.lt.u32 %p63, %r249, %r10;
|
|
@%p63 bra BB0_11;
|
|
|
|
BB0_46:
|
|
ld.global.u32 %r255, [imageEnabled];
|
|
and.b32 %r138, %r255, 8;
|
|
setp.eq.s32 %p64, %r138, 0;
|
|
@%p64 bra BB0_59;
|
|
|
|
cvt.sat.f32.f32 %f210, %f1422;
|
|
cvt.u64.u32 %rd70, %r3;
|
|
cvt.u64.u32 %rd69, %r2;
|
|
mov.u64 %rd73, image_Mask;
|
|
cvta.global.u64 %rd68, %rd73;
|
|
// inline asm
|
|
call (%rd67), _rt_buffer_get_64, (%rd68, %r33, %r33, %rd69, %rd70, %rd16, %rd16);
|
|
// inline asm
|
|
mov.f32 %f1014, 0f3E68BA2E;
|
|
cvt.rzi.f32.f32 %f1015, %f1014;
|
|
fma.rn.f32 %f1016, %f1015, 0fC0000000, 0f3EE8BA2E;
|
|
abs.f32 %f211, %f1016;
|
|
abs.f32 %f212, %f210;
|
|
setp.lt.f32 %p65, %f212, 0f00800000;
|
|
mul.f32 %f1017, %f212, 0f4B800000;
|
|
selp.f32 %f1018, 0fC3170000, 0fC2FE0000, %p65;
|
|
selp.f32 %f1019, %f1017, %f212, %p65;
|
|
mov.b32 %r141, %f1019;
|
|
and.b32 %r142, %r141, 8388607;
|
|
or.b32 %r143, %r142, 1065353216;
|
|
mov.b32 %f1020, %r143;
|
|
shr.u32 %r144, %r141, 23;
|
|
cvt.rn.f32.u32 %f1021, %r144;
|
|
add.f32 %f1022, %f1018, %f1021;
|
|
setp.gt.f32 %p66, %f1020, 0f3FB504F3;
|
|
mul.f32 %f1023, %f1020, 0f3F000000;
|
|
add.f32 %f1024, %f1022, 0f3F800000;
|
|
selp.f32 %f1025, %f1023, %f1020, %p66;
|
|
selp.f32 %f1026, %f1024, %f1022, %p66;
|
|
add.f32 %f1027, %f1025, 0fBF800000;
|
|
add.f32 %f1013, %f1025, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f1012,%f1013;
|
|
// inline asm
|
|
add.f32 %f1028, %f1027, %f1027;
|
|
mul.f32 %f1029, %f1012, %f1028;
|
|
mul.f32 %f1030, %f1029, %f1029;
|
|
mov.f32 %f1031, 0f3C4CAF63;
|
|
mov.f32 %f1032, 0f3B18F0FE;
|
|
fma.rn.f32 %f1033, %f1032, %f1030, %f1031;
|
|
mov.f32 %f1034, 0f3DAAAABD;
|
|
fma.rn.f32 %f1035, %f1033, %f1030, %f1034;
|
|
mul.rn.f32 %f1036, %f1035, %f1030;
|
|
mul.rn.f32 %f1037, %f1036, %f1029;
|
|
sub.f32 %f1038, %f1027, %f1029;
|
|
neg.f32 %f1039, %f1029;
|
|
add.f32 %f1040, %f1038, %f1038;
|
|
fma.rn.f32 %f1041, %f1039, %f1027, %f1040;
|
|
mul.rn.f32 %f1042, %f1012, %f1041;
|
|
add.f32 %f1043, %f1037, %f1029;
|
|
sub.f32 %f1044, %f1029, %f1043;
|
|
add.f32 %f1045, %f1037, %f1044;
|
|
add.f32 %f1046, %f1042, %f1045;
|
|
add.f32 %f1047, %f1043, %f1046;
|
|
sub.f32 %f1048, %f1043, %f1047;
|
|
add.f32 %f1049, %f1046, %f1048;
|
|
mov.f32 %f1050, 0f3F317200;
|
|
mul.rn.f32 %f1051, %f1026, %f1050;
|
|
mov.f32 %f1052, 0f35BFBE8E;
|
|
mul.rn.f32 %f1053, %f1026, %f1052;
|
|
add.f32 %f1054, %f1051, %f1047;
|
|
sub.f32 %f1055, %f1051, %f1054;
|
|
add.f32 %f1056, %f1047, %f1055;
|
|
add.f32 %f1057, %f1049, %f1056;
|
|
add.f32 %f1058, %f1053, %f1057;
|
|
add.f32 %f1059, %f1054, %f1058;
|
|
sub.f32 %f1060, %f1054, %f1059;
|
|
add.f32 %f1061, %f1058, %f1060;
|
|
mov.f32 %f1062, 0f3EE8BA2E;
|
|
mul.rn.f32 %f1063, %f1062, %f1059;
|
|
neg.f32 %f1064, %f1063;
|
|
fma.rn.f32 %f1065, %f1062, %f1059, %f1064;
|
|
fma.rn.f32 %f1066, %f1062, %f1061, %f1065;
|
|
mov.f32 %f1067, 0f00000000;
|
|
fma.rn.f32 %f1068, %f1067, %f1059, %f1066;
|
|
add.rn.f32 %f1069, %f1063, %f1068;
|
|
neg.f32 %f1070, %f1069;
|
|
add.rn.f32 %f1071, %f1063, %f1070;
|
|
add.rn.f32 %f1072, %f1071, %f1068;
|
|
mov.b32 %r145, %f1069;
|
|
setp.eq.s32 %p67, %r145, 1118925336;
|
|
add.s32 %r146, %r145, -1;
|
|
mov.b32 %f1073, %r146;
|
|
add.f32 %f1074, %f1072, 0f37000000;
|
|
selp.f32 %f1075, %f1073, %f1069, %p67;
|
|
selp.f32 %f213, %f1074, %f1072, %p67;
|
|
mul.f32 %f1076, %f1075, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f1077, %f1076;
|
|
mov.f32 %f1078, 0fBF317200;
|
|
fma.rn.f32 %f1079, %f1077, %f1078, %f1075;
|
|
mov.f32 %f1080, 0fB5BFBE8E;
|
|
fma.rn.f32 %f1081, %f1077, %f1080, %f1079;
|
|
mul.f32 %f1082, %f1081, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f1083, %f1082;
|
|
add.f32 %f1084, %f1077, 0f00000000;
|
|
ex2.approx.f32 %f1085, %f1084;
|
|
mul.f32 %f1086, %f1083, %f1085;
|
|
setp.lt.f32 %p68, %f1075, 0fC2D20000;
|
|
selp.f32 %f1087, 0f00000000, %f1086, %p68;
|
|
setp.gt.f32 %p69, %f1075, 0f42D20000;
|
|
selp.f32 %f1486, 0f7F800000, %f1087, %p69;
|
|
setp.eq.f32 %p70, %f1486, 0f7F800000;
|
|
@%p70 bra BB0_49;
|
|
|
|
fma.rn.f32 %f1486, %f1486, %f213, %f1486;
|
|
|
|
BB0_49:
|
|
setp.lt.f32 %p71, %f210, 0f00000000;
|
|
setp.eq.f32 %p72, %f211, 0f3F800000;
|
|
and.pred %p4, %p71, %p72;
|
|
mov.b32 %r147, %f1486;
|
|
xor.b32 %r148, %r147, -2147483648;
|
|
mov.b32 %f1088, %r148;
|
|
selp.f32 %f1488, %f1088, %f1486, %p4;
|
|
setp.eq.f32 %p73, %f210, 0f00000000;
|
|
@%p73 bra BB0_52;
|
|
bra.uni BB0_50;
|
|
|
|
BB0_52:
|
|
add.f32 %f1091, %f210, %f210;
|
|
selp.f32 %f1488, %f1091, 0f00000000, %p72;
|
|
bra.uni BB0_53;
|
|
|
|
BB0_114:
|
|
mov.u64 %rd194, image_HDR;
|
|
cvta.global.u64 %rd189, %rd194;
|
|
mov.u32 %r227, 8;
|
|
// inline asm
|
|
call (%rd188), _rt_buffer_get_64, (%rd189, %r33, %r227, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
mov.f32 %f1388, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs116, %f1388;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs117, 0;
|
|
st.v4.u16 [%rd188], {%rs116, %rs116, %rs116, %rs117};
|
|
|
|
BB0_115:
|
|
ld.global.u32 %r228, [additive];
|
|
setp.eq.s32 %p139, %r228, 0;
|
|
@%p139 bra BB0_117;
|
|
|
|
mov.u64 %rd207, image_RNM0;
|
|
cvta.global.u64 %rd196, %rd207;
|
|
mov.u32 %r232, 8;
|
|
// inline asm
|
|
call (%rd195), _rt_buffer_get_64, (%rd196, %r33, %r232, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
ld.v4.u16 {%rs124, %rs125, %rs126, %rs127}, [%rd195];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1389, %rs124;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1390, %rs125;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1391, %rs126;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd201), _rt_buffer_get_64, (%rd196, %r33, %r232, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
add.f32 %f1392, %f1389, 0f00000000;
|
|
add.f32 %f1393, %f1390, 0f00000000;
|
|
add.f32 %f1394, %f1391, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs123, %f1394;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs122, %f1393;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs121, %f1392;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs128, 0;
|
|
st.v4.u16 [%rd201], {%rs121, %rs122, %rs123, %rs128};
|
|
bra.uni BB0_118;
|
|
|
|
BB0_117:
|
|
mov.u64 %rd214, image_RNM0;
|
|
cvta.global.u64 %rd209, %rd214;
|
|
mov.u32 %r234, 8;
|
|
// inline asm
|
|
call (%rd208), _rt_buffer_get_64, (%rd209, %r33, %r234, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
mov.f32 %f1395, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs129, %f1395;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs130, 0;
|
|
st.v4.u16 [%rd208], {%rs129, %rs129, %rs129, %rs130};
|
|
|
|
BB0_118:
|
|
ld.global.u32 %r235, [additive];
|
|
setp.eq.s32 %p140, %r235, 0;
|
|
@%p140 bra BB0_120;
|
|
|
|
mov.u64 %rd227, image_RNM1;
|
|
cvta.global.u64 %rd216, %rd227;
|
|
mov.u32 %r239, 8;
|
|
// inline asm
|
|
call (%rd215), _rt_buffer_get_64, (%rd216, %r33, %r239, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
ld.v4.u16 {%rs137, %rs138, %rs139, %rs140}, [%rd215];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1396, %rs137;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1397, %rs138;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1398, %rs139;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd221), _rt_buffer_get_64, (%rd216, %r33, %r239, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
add.f32 %f1399, %f1396, 0f00000000;
|
|
add.f32 %f1400, %f1397, 0f00000000;
|
|
add.f32 %f1401, %f1398, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs136, %f1401;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs135, %f1400;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs134, %f1399;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs141, 0;
|
|
st.v4.u16 [%rd221], {%rs134, %rs135, %rs136, %rs141};
|
|
bra.uni BB0_121;
|
|
|
|
BB0_120:
|
|
mov.u64 %rd234, image_RNM1;
|
|
cvta.global.u64 %rd229, %rd234;
|
|
mov.u32 %r241, 8;
|
|
// inline asm
|
|
call (%rd228), _rt_buffer_get_64, (%rd229, %r33, %r241, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
mov.f32 %f1402, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs142, %f1402;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs143, 0;
|
|
st.v4.u16 [%rd228], {%rs142, %rs142, %rs142, %rs143};
|
|
|
|
BB0_121:
|
|
ld.global.u32 %r242, [additive];
|
|
setp.eq.s32 %p141, %r242, 0;
|
|
@%p141 bra BB0_123;
|
|
|
|
mov.u64 %rd247, image_RNM2;
|
|
cvta.global.u64 %rd236, %rd247;
|
|
mov.u32 %r246, 8;
|
|
// inline asm
|
|
call (%rd235), _rt_buffer_get_64, (%rd236, %r33, %r246, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
ld.v4.u16 {%rs150, %rs151, %rs152, %rs153}, [%rd235];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1403, %rs150;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1404, %rs151;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1405, %rs152;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd241), _rt_buffer_get_64, (%rd236, %r33, %r246, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
add.f32 %f1406, %f1403, 0f00000000;
|
|
add.f32 %f1407, %f1404, 0f00000000;
|
|
add.f32 %f1408, %f1405, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs149, %f1408;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs148, %f1407;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs147, %f1406;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs154, 0;
|
|
st.v4.u16 [%rd241], {%rs147, %rs148, %rs149, %rs154};
|
|
bra.uni BB0_124;
|
|
|
|
BB0_123:
|
|
mov.u64 %rd254, image_RNM2;
|
|
cvta.global.u64 %rd249, %rd254;
|
|
mov.u32 %r248, 8;
|
|
// inline asm
|
|
call (%rd248), _rt_buffer_get_64, (%rd249, %r33, %r248, %rd9, %rd10, %rd16, %rd16);
|
|
// inline asm
|
|
mov.f32 %f1409, 0f00000000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs155, %f1409;}
|
|
|
|
// inline asm
|
|
mov.u16 %rs156, 0;
|
|
st.v4.u16 [%rd248], {%rs155, %rs155, %rs155, %rs156};
|
|
bra.uni BB0_124;
|
|
|
|
BB0_50:
|
|
setp.geu.f32 %p74, %f210, 0f00000000;
|
|
@%p74 bra BB0_53;
|
|
|
|
cvt.rzi.f32.f32 %f1090, %f1062;
|
|
setp.neu.f32 %p75, %f1090, 0f3EE8BA2E;
|
|
selp.f32 %f1488, 0f7FFFFFFF, %f1488, %p75;
|
|
|
|
BB0_53:
|
|
add.f32 %f1092, %f212, 0f3EE8BA2E;
|
|
mov.b32 %r149, %f1092;
|
|
setp.lt.s32 %p77, %r149, 2139095040;
|
|
@%p77 bra BB0_58;
|
|
|
|
setp.gtu.f32 %p78, %f212, 0f7F800000;
|
|
@%p78 bra BB0_57;
|
|
bra.uni BB0_55;
|
|
|
|
BB0_57:
|
|
add.f32 %f1488, %f210, 0f3EE8BA2E;
|
|
bra.uni BB0_58;
|
|
|
|
BB0_55:
|
|
setp.neu.f32 %p79, %f212, 0f7F800000;
|
|
@%p79 bra BB0_58;
|
|
|
|
selp.f32 %f1488, 0fFF800000, 0f7F800000, %p4;
|
|
|
|
BB0_58:
|
|
mul.f32 %f1093, %f1488, 0f437F0000;
|
|
setp.eq.f32 %p80, %f210, 0f3F800000;
|
|
selp.f32 %f1094, 0f437F0000, %f1093, %p80;
|
|
cvt.rzi.u32.f32 %r150, %f1094;
|
|
cvt.u16.u32 %rs40, %r150;
|
|
mov.u16 %rs41, 255;
|
|
st.v2.u8 [%rd67], {%rs40, %rs41};
|
|
ld.global.u32 %r255, [imageEnabled];
|
|
|
|
BB0_59:
|
|
and.b32 %r151, %r255, 1;
|
|
setp.eq.b32 %p81, %r151, 1;
|
|
@!%p81 bra BB0_94;
|
|
bra.uni BB0_60;
|
|
|
|
BB0_60:
|
|
mov.f32 %f1097, 0f3E666666;
|
|
cvt.rzi.f32.f32 %f1098, %f1097;
|
|
fma.rn.f32 %f1099, %f1098, 0fC0000000, 0f3EE66666;
|
|
abs.f32 %f224, %f1099;
|
|
abs.f32 %f225, %f1434;
|
|
setp.lt.f32 %p82, %f225, 0f00800000;
|
|
mul.f32 %f1100, %f225, 0f4B800000;
|
|
selp.f32 %f1101, 0fC3170000, 0fC2FE0000, %p82;
|
|
selp.f32 %f1102, %f1100, %f225, %p82;
|
|
mov.b32 %r152, %f1102;
|
|
and.b32 %r153, %r152, 8388607;
|
|
or.b32 %r154, %r153, 1065353216;
|
|
mov.b32 %f1103, %r154;
|
|
shr.u32 %r155, %r152, 23;
|
|
cvt.rn.f32.u32 %f1104, %r155;
|
|
add.f32 %f1105, %f1101, %f1104;
|
|
setp.gt.f32 %p83, %f1103, 0f3FB504F3;
|
|
mul.f32 %f1106, %f1103, 0f3F000000;
|
|
add.f32 %f1107, %f1105, 0f3F800000;
|
|
selp.f32 %f1108, %f1106, %f1103, %p83;
|
|
selp.f32 %f1109, %f1107, %f1105, %p83;
|
|
add.f32 %f1110, %f1108, 0fBF800000;
|
|
add.f32 %f1096, %f1108, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f1095,%f1096;
|
|
// inline asm
|
|
add.f32 %f1111, %f1110, %f1110;
|
|
mul.f32 %f1112, %f1095, %f1111;
|
|
mul.f32 %f1113, %f1112, %f1112;
|
|
mov.f32 %f1114, 0f3C4CAF63;
|
|
mov.f32 %f1115, 0f3B18F0FE;
|
|
fma.rn.f32 %f1116, %f1115, %f1113, %f1114;
|
|
mov.f32 %f1117, 0f3DAAAABD;
|
|
fma.rn.f32 %f1118, %f1116, %f1113, %f1117;
|
|
mul.rn.f32 %f1119, %f1118, %f1113;
|
|
mul.rn.f32 %f1120, %f1119, %f1112;
|
|
sub.f32 %f1121, %f1110, %f1112;
|
|
neg.f32 %f1122, %f1112;
|
|
add.f32 %f1123, %f1121, %f1121;
|
|
fma.rn.f32 %f1124, %f1122, %f1110, %f1123;
|
|
mul.rn.f32 %f1125, %f1095, %f1124;
|
|
add.f32 %f1126, %f1120, %f1112;
|
|
sub.f32 %f1127, %f1112, %f1126;
|
|
add.f32 %f1128, %f1120, %f1127;
|
|
add.f32 %f1129, %f1125, %f1128;
|
|
add.f32 %f1130, %f1126, %f1129;
|
|
sub.f32 %f1131, %f1126, %f1130;
|
|
add.f32 %f1132, %f1129, %f1131;
|
|
mov.f32 %f1133, 0f3F317200;
|
|
mul.rn.f32 %f1134, %f1109, %f1133;
|
|
mov.f32 %f1135, 0f35BFBE8E;
|
|
mul.rn.f32 %f1136, %f1109, %f1135;
|
|
add.f32 %f1137, %f1134, %f1130;
|
|
sub.f32 %f1138, %f1134, %f1137;
|
|
add.f32 %f1139, %f1130, %f1138;
|
|
add.f32 %f1140, %f1132, %f1139;
|
|
add.f32 %f1141, %f1136, %f1140;
|
|
add.f32 %f1142, %f1137, %f1141;
|
|
sub.f32 %f1143, %f1137, %f1142;
|
|
add.f32 %f1144, %f1141, %f1143;
|
|
mov.f32 %f1145, 0f3EE66666;
|
|
mul.rn.f32 %f1146, %f1145, %f1142;
|
|
neg.f32 %f1147, %f1146;
|
|
fma.rn.f32 %f1148, %f1145, %f1142, %f1147;
|
|
fma.rn.f32 %f1149, %f1145, %f1144, %f1148;
|
|
mov.f32 %f1150, 0f00000000;
|
|
fma.rn.f32 %f1151, %f1150, %f1142, %f1149;
|
|
add.rn.f32 %f1152, %f1146, %f1151;
|
|
neg.f32 %f1153, %f1152;
|
|
add.rn.f32 %f1154, %f1146, %f1153;
|
|
add.rn.f32 %f1155, %f1154, %f1151;
|
|
mov.b32 %r156, %f1152;
|
|
setp.eq.s32 %p84, %r156, 1118925336;
|
|
add.s32 %r157, %r156, -1;
|
|
mov.b32 %f1156, %r157;
|
|
add.f32 %f1157, %f1155, 0f37000000;
|
|
selp.f32 %f1158, %f1156, %f1152, %p84;
|
|
selp.f32 %f226, %f1157, %f1155, %p84;
|
|
mul.f32 %f1159, %f1158, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f1160, %f1159;
|
|
mov.f32 %f1161, 0fBF317200;
|
|
fma.rn.f32 %f1162, %f1160, %f1161, %f1158;
|
|
mov.f32 %f1163, 0fB5BFBE8E;
|
|
fma.rn.f32 %f1164, %f1160, %f1163, %f1162;
|
|
mul.f32 %f1165, %f1164, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f1166, %f1165;
|
|
add.f32 %f1167, %f1160, 0f00000000;
|
|
ex2.approx.f32 %f1168, %f1167;
|
|
mul.f32 %f1169, %f1166, %f1168;
|
|
setp.lt.f32 %p85, %f1158, 0fC2D20000;
|
|
selp.f32 %f1170, 0f00000000, %f1169, %p85;
|
|
setp.gt.f32 %p86, %f1158, 0f42D20000;
|
|
selp.f32 %f1489, 0f7F800000, %f1170, %p86;
|
|
setp.eq.f32 %p87, %f1489, 0f7F800000;
|
|
@%p87 bra BB0_62;
|
|
|
|
fma.rn.f32 %f1489, %f1489, %f226, %f1489;
|
|
|
|
BB0_62:
|
|
setp.lt.f32 %p88, %f1434, 0f00000000;
|
|
setp.eq.f32 %p89, %f224, 0f3F800000;
|
|
and.pred %p5, %p88, %p89;
|
|
mov.b32 %r158, %f1489;
|
|
xor.b32 %r159, %r158, -2147483648;
|
|
mov.b32 %f1171, %r159;
|
|
selp.f32 %f1491, %f1171, %f1489, %p5;
|
|
setp.eq.f32 %p90, %f1434, 0f00000000;
|
|
@%p90 bra BB0_65;
|
|
bra.uni BB0_63;
|
|
|
|
BB0_65:
|
|
add.f32 %f1174, %f1434, %f1434;
|
|
selp.f32 %f1491, %f1174, 0f00000000, %p89;
|
|
bra.uni BB0_66;
|
|
|
|
BB0_63:
|
|
setp.geu.f32 %p91, %f1434, 0f00000000;
|
|
@%p91 bra BB0_66;
|
|
|
|
cvt.rzi.f32.f32 %f1173, %f1145;
|
|
setp.neu.f32 %p92, %f1173, 0f3EE66666;
|
|
selp.f32 %f1491, 0f7FFFFFFF, %f1491, %p92;
|
|
|
|
BB0_66:
|
|
add.f32 %f1175, %f225, 0f3EE66666;
|
|
mov.b32 %r160, %f1175;
|
|
setp.lt.s32 %p94, %r160, 2139095040;
|
|
@%p94 bra BB0_71;
|
|
|
|
setp.gtu.f32 %p95, %f225, 0f7F800000;
|
|
@%p95 bra BB0_70;
|
|
bra.uni BB0_68;
|
|
|
|
BB0_70:
|
|
add.f32 %f1491, %f1434, 0f3EE66666;
|
|
bra.uni BB0_71;
|
|
|
|
BB0_68:
|
|
setp.neu.f32 %p96, %f225, 0f7F800000;
|
|
@%p96 bra BB0_71;
|
|
|
|
selp.f32 %f1491, 0fFF800000, 0f7F800000, %p5;
|
|
|
|
BB0_71:
|
|
setp.eq.f32 %p97, %f1434, 0f3F800000;
|
|
selp.f32 %f237, 0f3F800000, %f1491, %p97;
|
|
abs.f32 %f238, %f1433;
|
|
setp.lt.f32 %p98, %f238, 0f00800000;
|
|
mul.f32 %f1178, %f238, 0f4B800000;
|
|
selp.f32 %f1179, 0fC3170000, 0fC2FE0000, %p98;
|
|
selp.f32 %f1180, %f1178, %f238, %p98;
|
|
mov.b32 %r161, %f1180;
|
|
and.b32 %r162, %r161, 8388607;
|
|
or.b32 %r163, %r162, 1065353216;
|
|
mov.b32 %f1181, %r163;
|
|
shr.u32 %r164, %r161, 23;
|
|
cvt.rn.f32.u32 %f1182, %r164;
|
|
add.f32 %f1183, %f1179, %f1182;
|
|
setp.gt.f32 %p99, %f1181, 0f3FB504F3;
|
|
mul.f32 %f1184, %f1181, 0f3F000000;
|
|
add.f32 %f1185, %f1183, 0f3F800000;
|
|
selp.f32 %f1186, %f1184, %f1181, %p99;
|
|
selp.f32 %f1187, %f1185, %f1183, %p99;
|
|
add.f32 %f1188, %f1186, 0fBF800000;
|
|
add.f32 %f1177, %f1186, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f1176,%f1177;
|
|
// inline asm
|
|
add.f32 %f1189, %f1188, %f1188;
|
|
mul.f32 %f1190, %f1176, %f1189;
|
|
mul.f32 %f1191, %f1190, %f1190;
|
|
fma.rn.f32 %f1194, %f1115, %f1191, %f1114;
|
|
fma.rn.f32 %f1196, %f1194, %f1191, %f1117;
|
|
mul.rn.f32 %f1197, %f1196, %f1191;
|
|
mul.rn.f32 %f1198, %f1197, %f1190;
|
|
sub.f32 %f1199, %f1188, %f1190;
|
|
neg.f32 %f1200, %f1190;
|
|
add.f32 %f1201, %f1199, %f1199;
|
|
fma.rn.f32 %f1202, %f1200, %f1188, %f1201;
|
|
mul.rn.f32 %f1203, %f1176, %f1202;
|
|
add.f32 %f1204, %f1198, %f1190;
|
|
sub.f32 %f1205, %f1190, %f1204;
|
|
add.f32 %f1206, %f1198, %f1205;
|
|
add.f32 %f1207, %f1203, %f1206;
|
|
add.f32 %f1208, %f1204, %f1207;
|
|
sub.f32 %f1209, %f1204, %f1208;
|
|
add.f32 %f1210, %f1207, %f1209;
|
|
mul.rn.f32 %f1212, %f1187, %f1133;
|
|
mul.rn.f32 %f1214, %f1187, %f1135;
|
|
add.f32 %f1215, %f1212, %f1208;
|
|
sub.f32 %f1216, %f1212, %f1215;
|
|
add.f32 %f1217, %f1208, %f1216;
|
|
add.f32 %f1218, %f1210, %f1217;
|
|
add.f32 %f1219, %f1214, %f1218;
|
|
add.f32 %f1220, %f1215, %f1219;
|
|
sub.f32 %f1221, %f1215, %f1220;
|
|
add.f32 %f1222, %f1219, %f1221;
|
|
mul.rn.f32 %f1224, %f1145, %f1220;
|
|
neg.f32 %f1225, %f1224;
|
|
fma.rn.f32 %f1226, %f1145, %f1220, %f1225;
|
|
fma.rn.f32 %f1227, %f1145, %f1222, %f1226;
|
|
fma.rn.f32 %f1229, %f1150, %f1220, %f1227;
|
|
add.rn.f32 %f1230, %f1224, %f1229;
|
|
neg.f32 %f1231, %f1230;
|
|
add.rn.f32 %f1232, %f1224, %f1231;
|
|
add.rn.f32 %f1233, %f1232, %f1229;
|
|
mov.b32 %r165, %f1230;
|
|
setp.eq.s32 %p100, %r165, 1118925336;
|
|
add.s32 %r166, %r165, -1;
|
|
mov.b32 %f1234, %r166;
|
|
add.f32 %f1235, %f1233, 0f37000000;
|
|
selp.f32 %f1236, %f1234, %f1230, %p100;
|
|
selp.f32 %f239, %f1235, %f1233, %p100;
|
|
mul.f32 %f1237, %f1236, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f1238, %f1237;
|
|
fma.rn.f32 %f1240, %f1238, %f1161, %f1236;
|
|
fma.rn.f32 %f1242, %f1238, %f1163, %f1240;
|
|
mul.f32 %f1243, %f1242, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f1244, %f1243;
|
|
add.f32 %f1245, %f1238, 0f00000000;
|
|
ex2.approx.f32 %f1246, %f1245;
|
|
mul.f32 %f1247, %f1244, %f1246;
|
|
setp.lt.f32 %p101, %f1236, 0fC2D20000;
|
|
selp.f32 %f1248, 0f00000000, %f1247, %p101;
|
|
setp.gt.f32 %p102, %f1236, 0f42D20000;
|
|
selp.f32 %f1492, 0f7F800000, %f1248, %p102;
|
|
setp.eq.f32 %p103, %f1492, 0f7F800000;
|
|
@%p103 bra BB0_73;
|
|
|
|
fma.rn.f32 %f1492, %f1492, %f239, %f1492;
|
|
|
|
BB0_73:
|
|
setp.lt.f32 %p104, %f1433, 0f00000000;
|
|
and.pred %p6, %p104, %p89;
|
|
mov.b32 %r167, %f1492;
|
|
xor.b32 %r168, %r167, -2147483648;
|
|
mov.b32 %f1249, %r168;
|
|
selp.f32 %f1494, %f1249, %f1492, %p6;
|
|
setp.eq.f32 %p106, %f1433, 0f00000000;
|
|
@%p106 bra BB0_76;
|
|
bra.uni BB0_74;
|
|
|
|
BB0_76:
|
|
add.f32 %f1252, %f1433, %f1433;
|
|
selp.f32 %f1494, %f1252, 0f00000000, %p89;
|
|
bra.uni BB0_77;
|
|
|
|
BB0_74:
|
|
setp.geu.f32 %p107, %f1433, 0f00000000;
|
|
@%p107 bra BB0_77;
|
|
|
|
cvt.rzi.f32.f32 %f1251, %f1145;
|
|
setp.neu.f32 %p108, %f1251, 0f3EE66666;
|
|
selp.f32 %f1494, 0f7FFFFFFF, %f1494, %p108;
|
|
|
|
BB0_77:
|
|
add.f32 %f1253, %f238, 0f3EE66666;
|
|
mov.b32 %r169, %f1253;
|
|
setp.lt.s32 %p110, %r169, 2139095040;
|
|
@%p110 bra BB0_82;
|
|
|
|
setp.gtu.f32 %p111, %f238, 0f7F800000;
|
|
@%p111 bra BB0_81;
|
|
bra.uni BB0_79;
|
|
|
|
BB0_81:
|
|
add.f32 %f1494, %f1433, 0f3EE66666;
|
|
bra.uni BB0_82;
|
|
|
|
BB0_79:
|
|
setp.neu.f32 %p112, %f238, 0f7F800000;
|
|
@%p112 bra BB0_82;
|
|
|
|
selp.f32 %f1494, 0fFF800000, 0f7F800000, %p6;
|
|
|
|
BB0_82:
|
|
setp.eq.f32 %p113, %f1433, 0f3F800000;
|
|
selp.f32 %f250, 0f3F800000, %f1494, %p113;
|
|
abs.f32 %f251, %f1432;
|
|
setp.lt.f32 %p114, %f251, 0f00800000;
|
|
mul.f32 %f1256, %f251, 0f4B800000;
|
|
selp.f32 %f1257, 0fC3170000, 0fC2FE0000, %p114;
|
|
selp.f32 %f1258, %f1256, %f251, %p114;
|
|
mov.b32 %r170, %f1258;
|
|
and.b32 %r171, %r170, 8388607;
|
|
or.b32 %r172, %r171, 1065353216;
|
|
mov.b32 %f1259, %r172;
|
|
shr.u32 %r173, %r170, 23;
|
|
cvt.rn.f32.u32 %f1260, %r173;
|
|
add.f32 %f1261, %f1257, %f1260;
|
|
setp.gt.f32 %p115, %f1259, 0f3FB504F3;
|
|
mul.f32 %f1262, %f1259, 0f3F000000;
|
|
add.f32 %f1263, %f1261, 0f3F800000;
|
|
selp.f32 %f1264, %f1262, %f1259, %p115;
|
|
selp.f32 %f1265, %f1263, %f1261, %p115;
|
|
add.f32 %f1266, %f1264, 0fBF800000;
|
|
add.f32 %f1255, %f1264, 0f3F800000;
|
|
// inline asm
|
|
rcp.approx.ftz.f32 %f1254,%f1255;
|
|
// inline asm
|
|
add.f32 %f1267, %f1266, %f1266;
|
|
mul.f32 %f1268, %f1254, %f1267;
|
|
mul.f32 %f1269, %f1268, %f1268;
|
|
fma.rn.f32 %f1272, %f1115, %f1269, %f1114;
|
|
fma.rn.f32 %f1274, %f1272, %f1269, %f1117;
|
|
mul.rn.f32 %f1275, %f1274, %f1269;
|
|
mul.rn.f32 %f1276, %f1275, %f1268;
|
|
sub.f32 %f1277, %f1266, %f1268;
|
|
neg.f32 %f1278, %f1268;
|
|
add.f32 %f1279, %f1277, %f1277;
|
|
fma.rn.f32 %f1280, %f1278, %f1266, %f1279;
|
|
mul.rn.f32 %f1281, %f1254, %f1280;
|
|
add.f32 %f1282, %f1276, %f1268;
|
|
sub.f32 %f1283, %f1268, %f1282;
|
|
add.f32 %f1284, %f1276, %f1283;
|
|
add.f32 %f1285, %f1281, %f1284;
|
|
add.f32 %f1286, %f1282, %f1285;
|
|
sub.f32 %f1287, %f1282, %f1286;
|
|
add.f32 %f1288, %f1285, %f1287;
|
|
mul.rn.f32 %f1290, %f1265, %f1133;
|
|
mul.rn.f32 %f1292, %f1265, %f1135;
|
|
add.f32 %f1293, %f1290, %f1286;
|
|
sub.f32 %f1294, %f1290, %f1293;
|
|
add.f32 %f1295, %f1286, %f1294;
|
|
add.f32 %f1296, %f1288, %f1295;
|
|
add.f32 %f1297, %f1292, %f1296;
|
|
add.f32 %f1298, %f1293, %f1297;
|
|
sub.f32 %f1299, %f1293, %f1298;
|
|
add.f32 %f1300, %f1297, %f1299;
|
|
mul.rn.f32 %f1302, %f1145, %f1298;
|
|
neg.f32 %f1303, %f1302;
|
|
fma.rn.f32 %f1304, %f1145, %f1298, %f1303;
|
|
fma.rn.f32 %f1305, %f1145, %f1300, %f1304;
|
|
fma.rn.f32 %f1307, %f1150, %f1298, %f1305;
|
|
add.rn.f32 %f1308, %f1302, %f1307;
|
|
neg.f32 %f1309, %f1308;
|
|
add.rn.f32 %f1310, %f1302, %f1309;
|
|
add.rn.f32 %f1311, %f1310, %f1307;
|
|
mov.b32 %r174, %f1308;
|
|
setp.eq.s32 %p116, %r174, 1118925336;
|
|
add.s32 %r175, %r174, -1;
|
|
mov.b32 %f1312, %r175;
|
|
add.f32 %f1313, %f1311, 0f37000000;
|
|
selp.f32 %f1314, %f1312, %f1308, %p116;
|
|
selp.f32 %f252, %f1313, %f1311, %p116;
|
|
mul.f32 %f1315, %f1314, 0f3FB8AA3B;
|
|
cvt.rzi.f32.f32 %f1316, %f1315;
|
|
fma.rn.f32 %f1318, %f1316, %f1161, %f1314;
|
|
fma.rn.f32 %f1320, %f1316, %f1163, %f1318;
|
|
mul.f32 %f1321, %f1320, 0f3FB8AA3B;
|
|
ex2.approx.ftz.f32 %f1322, %f1321;
|
|
add.f32 %f1323, %f1316, 0f00000000;
|
|
ex2.approx.f32 %f1324, %f1323;
|
|
mul.f32 %f1325, %f1322, %f1324;
|
|
setp.lt.f32 %p117, %f1314, 0fC2D20000;
|
|
selp.f32 %f1326, 0f00000000, %f1325, %p117;
|
|
setp.gt.f32 %p118, %f1314, 0f42D20000;
|
|
selp.f32 %f1495, 0f7F800000, %f1326, %p118;
|
|
setp.eq.f32 %p119, %f1495, 0f7F800000;
|
|
@%p119 bra BB0_84;
|
|
|
|
fma.rn.f32 %f1495, %f1495, %f252, %f1495;
|
|
|
|
BB0_84:
|
|
setp.lt.f32 %p120, %f1432, 0f00000000;
|
|
and.pred %p7, %p120, %p89;
|
|
mov.b32 %r176, %f1495;
|
|
xor.b32 %r177, %r176, -2147483648;
|
|
mov.b32 %f1327, %r177;
|
|
selp.f32 %f1497, %f1327, %f1495, %p7;
|
|
setp.eq.f32 %p122, %f1432, 0f00000000;
|
|
@%p122 bra BB0_87;
|
|
bra.uni BB0_85;
|
|
|
|
BB0_87:
|
|
add.f32 %f1330, %f1432, %f1432;
|
|
selp.f32 %f1497, %f1330, 0f00000000, %p89;
|
|
bra.uni BB0_88;
|
|
|
|
BB0_85:
|
|
setp.geu.f32 %p123, %f1432, 0f00000000;
|
|
@%p123 bra BB0_88;
|
|
|
|
cvt.rzi.f32.f32 %f1329, %f1145;
|
|
setp.neu.f32 %p124, %f1329, 0f3EE66666;
|
|
selp.f32 %f1497, 0f7FFFFFFF, %f1497, %p124;
|
|
|
|
BB0_88:
|
|
add.f32 %f1331, %f251, 0f3EE66666;
|
|
mov.b32 %r178, %f1331;
|
|
setp.lt.s32 %p126, %r178, 2139095040;
|
|
@%p126 bra BB0_93;
|
|
|
|
setp.gtu.f32 %p127, %f251, 0f7F800000;
|
|
@%p127 bra BB0_92;
|
|
bra.uni BB0_90;
|
|
|
|
BB0_92:
|
|
add.f32 %f1497, %f1432, 0f3EE66666;
|
|
bra.uni BB0_93;
|
|
|
|
BB0_90:
|
|
setp.neu.f32 %p128, %f251, 0f7F800000;
|
|
@%p128 bra BB0_93;
|
|
|
|
selp.f32 %f1497, 0fFF800000, 0f7F800000, %p7;
|
|
|
|
BB0_93:
|
|
setp.eq.f32 %p129, %f1432, 0f3F800000;
|
|
selp.f32 %f1332, 0f3F800000, %f1497, %p129;
|
|
cvt.u64.u32 %rd77, %r3;
|
|
cvt.u64.u32 %rd76, %r2;
|
|
mov.u64 %rd80, image;
|
|
cvta.global.u64 %rd75, %rd80;
|
|
// inline asm
|
|
call (%rd74), _rt_buffer_get_64, (%rd75, %r33, %r34, %rd76, %rd77, %rd16, %rd16);
|
|
// inline asm
|
|
cvt.sat.f32.f32 %f1333, %f1332;
|
|
mul.f32 %f1334, %f1333, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r181, %f1334;
|
|
cvt.sat.f32.f32 %f1335, %f250;
|
|
mul.f32 %f1336, %f1335, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r182, %f1336;
|
|
cvt.sat.f32.f32 %f1337, %f237;
|
|
mul.f32 %f1338, %f1337, 0f437FFD71;
|
|
cvt.rzi.u32.f32 %r183, %f1338;
|
|
cvt.u16.u32 %rs42, %r181;
|
|
cvt.u16.u32 %rs43, %r183;
|
|
cvt.u16.u32 %rs44, %r182;
|
|
mov.u16 %rs45, 255;
|
|
st.v4.u8 [%rd74], {%rs42, %rs44, %rs43, %rs45};
|
|
ld.global.u32 %r255, [imageEnabled];
|
|
|
|
BB0_94:
|
|
cvt.u64.u32 %rd7, %r2;
|
|
cvt.u64.u32 %rd8, %r3;
|
|
and.b32 %r184, %r255, 4;
|
|
setp.eq.s32 %p130, %r184, 0;
|
|
@%p130 bra BB0_98;
|
|
|
|
ld.global.u32 %r185, [additive];
|
|
setp.eq.s32 %p131, %r185, 0;
|
|
mov.f32 %f1339, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs46, %f1339;}
|
|
|
|
// inline asm
|
|
@%p131 bra BB0_97;
|
|
|
|
mov.u64 %rd93, image_HDR;
|
|
cvta.global.u64 %rd82, %rd93;
|
|
mov.u32 %r189, 8;
|
|
// inline asm
|
|
call (%rd81), _rt_buffer_get_64, (%rd82, %r33, %r189, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
ld.v4.u16 {%rs53, %rs54, %rs55, %rs56}, [%rd81];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1340, %rs53;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1341, %rs54;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1342, %rs55;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd87), _rt_buffer_get_64, (%rd82, %r33, %r189, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
add.f32 %f1343, %f1434, %f1340;
|
|
add.f32 %f1344, %f1433, %f1341;
|
|
add.f32 %f1345, %f1432, %f1342;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs52, %f1345;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs51, %f1344;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs50, %f1343;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd87], {%rs50, %rs51, %rs52, %rs46};
|
|
bra.uni BB0_98;
|
|
|
|
BB0_97:
|
|
mov.u64 %rd100, image_HDR;
|
|
cvta.global.u64 %rd95, %rd100;
|
|
mov.u32 %r191, 8;
|
|
// inline asm
|
|
call (%rd94), _rt_buffer_get_64, (%rd95, %r33, %r191, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs59, %f1432;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs58, %f1433;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs57, %f1434;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd94], {%rs57, %rs58, %rs59, %rs46};
|
|
|
|
BB0_98:
|
|
ld.global.u32 %r192, [additive];
|
|
setp.eq.s32 %p132, %r192, 0;
|
|
mov.f32 %f1349, 0f3F800000;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs60, %f1349;}
|
|
|
|
// inline asm
|
|
@%p132 bra BB0_100;
|
|
|
|
mov.u64 %rd113, image_RNM0;
|
|
cvta.global.u64 %rd102, %rd113;
|
|
mov.u32 %r196, 8;
|
|
// inline asm
|
|
call (%rd101), _rt_buffer_get_64, (%rd102, %r33, %r196, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
ld.v4.u16 {%rs67, %rs68, %rs69, %rs70}, [%rd101];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1350, %rs67;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1351, %rs68;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1352, %rs69;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd107), _rt_buffer_get_64, (%rd102, %r33, %r196, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
add.f32 %f1353, %f1431, %f1350;
|
|
add.f32 %f1354, %f1430, %f1351;
|
|
add.f32 %f1355, %f1429, %f1352;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs66, %f1355;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs65, %f1354;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs64, %f1353;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd107], {%rs64, %rs65, %rs66, %rs60};
|
|
bra.uni BB0_101;
|
|
|
|
BB0_100:
|
|
mov.u64 %rd120, image_RNM0;
|
|
cvta.global.u64 %rd115, %rd120;
|
|
mov.u32 %r198, 8;
|
|
// inline asm
|
|
call (%rd114), _rt_buffer_get_64, (%rd115, %r33, %r198, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs73, %f1429;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs72, %f1430;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs71, %f1431;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd114], {%rs71, %rs72, %rs73, %rs60};
|
|
|
|
BB0_101:
|
|
ld.global.u32 %r199, [additive];
|
|
setp.eq.s32 %p133, %r199, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs74, %f1349;}
|
|
|
|
// inline asm
|
|
@%p133 bra BB0_103;
|
|
|
|
mov.u64 %rd133, image_RNM1;
|
|
cvta.global.u64 %rd122, %rd133;
|
|
mov.u32 %r203, 8;
|
|
// inline asm
|
|
call (%rd121), _rt_buffer_get_64, (%rd122, %r33, %r203, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
ld.v4.u16 {%rs81, %rs82, %rs83, %rs84}, [%rd121];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1360, %rs81;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1361, %rs82;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1362, %rs83;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd127), _rt_buffer_get_64, (%rd122, %r33, %r203, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
add.f32 %f1363, %f1428, %f1360;
|
|
add.f32 %f1364, %f1427, %f1361;
|
|
add.f32 %f1365, %f1426, %f1362;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs80, %f1365;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs79, %f1364;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs78, %f1363;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd127], {%rs78, %rs79, %rs80, %rs74};
|
|
bra.uni BB0_104;
|
|
|
|
BB0_103:
|
|
mov.u64 %rd140, image_RNM1;
|
|
cvta.global.u64 %rd135, %rd140;
|
|
mov.u32 %r205, 8;
|
|
// inline asm
|
|
call (%rd134), _rt_buffer_get_64, (%rd135, %r33, %r205, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs87, %f1426;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs86, %f1427;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs85, %f1428;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd134], {%rs85, %rs86, %rs87, %rs74};
|
|
|
|
BB0_104:
|
|
ld.global.u32 %r206, [additive];
|
|
setp.eq.s32 %p134, %r206, 0;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs88, %f1349;}
|
|
|
|
// inline asm
|
|
@%p134 bra BB0_106;
|
|
|
|
mov.u64 %rd153, image_RNM2;
|
|
cvta.global.u64 %rd142, %rd153;
|
|
mov.u32 %r210, 8;
|
|
// inline asm
|
|
call (%rd141), _rt_buffer_get_64, (%rd142, %r33, %r210, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
ld.v4.u16 {%rs95, %rs96, %rs97, %rs98}, [%rd141];
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1370, %rs95;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1371, %rs96;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.f32.f16 %f1372, %rs97;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
call (%rd147), _rt_buffer_get_64, (%rd142, %r33, %r210, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
add.f32 %f1373, %f1425, %f1370;
|
|
add.f32 %f1374, %f1424, %f1371;
|
|
add.f32 %f1375, %f1423, %f1372;
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs94, %f1375;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs93, %f1374;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs92, %f1373;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd147], {%rs92, %rs93, %rs94, %rs88};
|
|
bra.uni BB0_124;
|
|
|
|
BB0_106:
|
|
mov.u64 %rd160, image_RNM2;
|
|
cvta.global.u64 %rd155, %rd160;
|
|
mov.u32 %r212, 8;
|
|
// inline asm
|
|
call (%rd154), _rt_buffer_get_64, (%rd155, %r33, %r212, %rd7, %rd8, %rd16, %rd16);
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs101, %f1423;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs100, %f1424;}
|
|
|
|
// inline asm
|
|
// inline asm
|
|
{ cvt.rn.f16.f32 %rs99, %f1425;}
|
|
|
|
// inline asm
|
|
st.v4.u16 [%rd154], {%rs99, %rs100, %rs101, %rs88};
|
|
|
|
BB0_124:
|
|
ret;
|
|
}
|
|
|
|
|