//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-23083092
// Cuda compilation tools, release 9.1, V9.1.85
// Based on LLVM 3.4svn
//

.version 6.1
.target sm_30
.address_size 64

	// .globl	_Z6oxMainv
.global .align 8 .b8 pixelID[8];
.global .align 8 .b8 resolution[8];
.global .align 4 .b8 normal[12];
.global .align 4 .b8 camPos[12];
.global .align 4 .b8 root[4];
.global .align 4 .u32 imageEnabled;
.global .texref lightmap;
.global .align 16 .b8 tileInfo[16];
.global .align 4 .u32 additive;
.global .align 1 .b8 image[1];
.global .align 1 .b8 image_HDR[1];
.global .align 1 .b8 image_HDR2[1];
.global .align 8 .b8 texCoords[8];
.global .align 1 .b8 uvpos[1];
.global .align 1 .b8 uvnormal[1];
.global .align 1 .b8 rnd_seeds[1];
.global .align 1 .b8 lightmapDirect[1];
.global .align 4 .u32 samples;
.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo9texCoordsE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename9texCoordsE[7] = {102, 108, 111, 97, 116, 50, 0};
.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0};
.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum9texCoordsE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919;
.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
.global .align 16 .b8 _ZN21rti_internal_semantic9texCoordsE[20] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 116, 101, 120, 67, 111, 111, 114, 100, 115, 0};
.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation9texCoordsE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1];
.const .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};

.visible .entry _Z6oxMainv(

)
{
	.local .align 4 .b8 	__local_depot0[40];
	.reg .b64 	%SP;
	.reg .b64 	%SPL;
	.reg .pred 	%p<95>;
	.reg .b16 	%rs<27>;
	.reg .f32 	%f<624>;
	.reg .b32 	%r<311>;
	.reg .b64 	%rd<105>;


	mov.u64 	%rd104, __local_depot0;
	cvta.local.u64 	%SP, %rd104;
	ld.global.v2.u32 	{%r97, %r98}, [pixelID];
	cvt.u64.u32	%rd18, %r97;
	cvt.u64.u32	%rd19, %r98;
	mov.u64 	%rd22, uvnormal;
	cvta.global.u64 	%rd17, %rd22;
	mov.u32 	%r95, 2;
	mov.u32 	%r96, 4;
	mov.u64 	%rd21, 0;
	// inline asm
	call (%rd16), _rt_buffer_get_64, (%rd17, %r95, %r96, %rd18, %rd19, %rd21, %rd21);
	// inline asm
	ld.u32 	%r1, [%rd16];
	shr.u32 	%r101, %r1, 16;
	cvt.u16.u32	%rs1, %r101;
	and.b16  	%rs2, %rs1, 255;
	cvt.u16.u32	%rs3, %r1;
	or.b16  	%rs4, %rs3, %rs2;
	setp.eq.s16	%p4, %rs4, 0;
	mov.f32 	%f582, 0f00000000;
	mov.f32 	%f583, %f582;
	mov.f32 	%f584, %f582;
	@%p4 bra 	BB0_2;

	ld.u8 	%rs5, [%rd16+1];
	and.b16  	%rs7, %rs3, 255;
	cvt.rn.f32.u16	%f135, %rs7;
	div.rn.f32 	%f136, %f135, 0f437F0000;
	fma.rn.f32 	%f137, %f136, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f138, %rs5;
	div.rn.f32 	%f139, %f138, 0f437F0000;
	fma.rn.f32 	%f140, %f139, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f141, %rs2;
	div.rn.f32 	%f142, %f141, 0f437F0000;
	fma.rn.f32 	%f143, %f142, 0f40000000, 0fBF800000;
	mul.f32 	%f144, %f140, %f140;
	fma.rn.f32 	%f145, %f137, %f137, %f144;
	fma.rn.f32 	%f146, %f143, %f143, %f145;
	sqrt.rn.f32 	%f147, %f146;
	rcp.rn.f32 	%f148, %f147;
	mul.f32 	%f582, %f137, %f148;
	mul.f32 	%f583, %f140, %f148;
	mul.f32 	%f584, %f143, %f148;

BB0_2:
	ld.global.v2.u32 	{%r102, %r103}, [pixelID];
	ld.global.v2.u32 	{%r105, %r106}, [tileInfo];
	add.s32 	%r2, %r102, %r105;
	add.s32 	%r3, %r103, %r106;
	setp.eq.f32	%p5, %f583, 0f00000000;
	setp.eq.f32	%p6, %f582, 0f00000000;
	and.pred  	%p7, %p6, %p5;
	setp.eq.f32	%p8, %f584, 0f00000000;
	and.pred  	%p9, %p7, %p8;
	@%p9 bra 	BB0_97;
	bra.uni 	BB0_3;

BB0_97:
	ld.global.u32 	%r310, [imageEnabled];
	and.b32  	%r269, %r310, 1;
	setp.eq.b32	%p93, %r269, 1;
	@!%p93 bra 	BB0_99;
	bra.uni 	BB0_98;

BB0_98:
	cvt.u64.u32	%rd86, %r2;
	cvt.u64.u32	%rd87, %r3;
	mov.u64 	%rd90, image;
	cvta.global.u64 	%rd85, %rd90;
	mov.u64 	%rd89, 0;
	// inline asm
	call (%rd84), _rt_buffer_get_64, (%rd85, %r95, %r96, %rd86, %rd87, %rd89, %rd89);
	// inline asm
	mov.u16 	%rs24, 0;
	st.v4.u8 	[%rd84], {%rs24, %rs24, %rs24, %rs24};
	ld.global.u32 	%r310, [imageEnabled];

BB0_99:
	and.b32  	%r272, %r310, 4;
	setp.eq.s32	%p94, %r272, 0;
	@%p94 bra 	BB0_101;

	cvt.u64.u32	%rd93, %r2;
	cvt.u64.u32	%rd94, %r3;
	mov.u64 	%rd97, image_HDR;
	cvta.global.u64 	%rd92, %rd97;
	mov.u32 	%r274, 8;
	mov.u64 	%rd96, 0;
	// inline asm
	call (%rd91), _rt_buffer_get_64, (%rd92, %r95, %r274, %rd93, %rd94, %rd96, %rd96);
	// inline asm
	mov.f32 	%f552, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs25, %f552;}

	// inline asm
	mov.u16 	%rs26, 0;
	st.v4.u16 	[%rd91], {%rs25, %rs25, %rs25, %rs26};
	bra.uni 	BB0_101;

BB0_3:
	ld.global.v2.u32 	{%r115, %r116}, [pixelID];
	cvt.u64.u32	%rd25, %r115;
	cvt.u64.u32	%rd26, %r116;
	mov.u64 	%rd30, uvpos;
	cvta.global.u64 	%rd24, %rd30;
	mov.u32 	%r114, 12;
	// inline asm
	call (%rd23), _rt_buffer_get_64, (%rd24, %r95, %r114, %rd25, %rd26, %rd21, %rd21);
	// inline asm
	ld.f32 	%f157, [%rd23+8];
	ld.f32 	%f158, [%rd23+4];
	ld.f32 	%f159, [%rd23];
	mul.f32 	%f160, %f159, 0f3456BF95;
	mul.f32 	%f161, %f158, 0f3456BF95;
	mul.f32 	%f162, %f157, 0f3456BF95;
	abs.f32 	%f163, %f582;
	div.rn.f32 	%f164, %f160, %f163;
	abs.f32 	%f165, %f583;
	div.rn.f32 	%f166, %f161, %f165;
	abs.f32 	%f167, %f584;
	div.rn.f32 	%f168, %f162, %f167;
	abs.f32 	%f169, %f164;
	abs.f32 	%f170, %f166;
	abs.f32 	%f171, %f168;
	mov.f32 	%f172, 0f38D1B717;
	max.f32 	%f173, %f169, %f172;
	max.f32 	%f174, %f170, %f172;
	max.f32 	%f175, %f171, %f172;
	fma.rn.f32 	%f585, %f582, %f173, %f159;
	fma.rn.f32 	%f586, %f583, %f174, %f158;
	fma.rn.f32 	%f587, %f584, %f175, %f157;
	add.u64 	%rd29, %SP, 28;
	cvta.to.local.u64 	%rd31, %rd29;
	mov.u32 	%r113, 0;
	st.local.u32 	[%rd31+8], %r113;
	st.local.u32 	[%rd31+4], %r113;
	st.local.u32 	[%rd31], %r113;
	ld.global.u32 	%r112, [root];
	neg.f32 	%f154, %f584;
	neg.f32 	%f153, %f583;
	neg.f32 	%f152, %f582;
	mov.f32 	%f591, 0f00000000;
	mov.f32 	%f156, 0f6C4ECB8F;
	// inline asm
	call _rt_trace_64, (%r112, %f585, %f586, %f587, %f152, %f153, %f154, %r113, %f591, %f156, %rd29, %r114);
	// inline asm
	ld.local.f32 	%f13, [%rd31];
	abs.f32 	%f14, %f152;
	abs.f32 	%f15, %f154;
	setp.geu.f32	%p10, %f13, 0f00000000;
	@%p10 bra 	BB0_5;

	fma.rn.f32 	%f176, %f582, %f13, %f585;
	fma.rn.f32 	%f177, %f583, %f13, %f586;
	fma.rn.f32 	%f178, %f584, %f13, %f587;
	mul.f32 	%f179, %f176, 0f3456BF95;
	mul.f32 	%f180, %f177, 0f3456BF95;
	mul.f32 	%f181, %f178, 0f3456BF95;
	div.rn.f32 	%f182, %f179, %f14;
	abs.f32 	%f183, %f153;
	div.rn.f32 	%f184, %f180, %f183;
	div.rn.f32 	%f185, %f181, %f15;
	abs.f32 	%f186, %f182;
	abs.f32 	%f187, %f184;
	abs.f32 	%f188, %f185;
	max.f32 	%f190, %f186, %f172;
	max.f32 	%f191, %f187, %f172;
	max.f32 	%f192, %f188, %f172;
	fma.rn.f32 	%f585, %f190, %f152, %f176;
	fma.rn.f32 	%f586, %f191, %f153, %f177;
	fma.rn.f32 	%f587, %f192, %f154, %f178;

BB0_5:
	mov.u32 	%r279, 4;
	mov.u32 	%r278, 2;
	setp.gt.f32	%p11, %f14, %f15;
	selp.f32	%f196, %f583, 0f00000000, %p11;
	selp.f32	%f197, %f152, %f584, %p11;
	selp.f32	%f198, 0f00000000, %f153, %p11;
	mul.f32 	%f199, %f197, %f197;
	fma.rn.f32 	%f200, %f196, %f196, %f199;
	fma.rn.f32 	%f201, %f198, %f198, %f200;
	sqrt.rn.f32 	%f202, %f201;
	rcp.rn.f32 	%f203, %f202;
	mul.f32 	%f22, %f196, %f203;
	mul.f32 	%f23, %f197, %f203;
	mul.f32 	%f24, %f198, %f203;
	ld.global.v2.u32 	{%r121, %r122}, [pixelID];
	cvt.u64.u32	%rd34, %r121;
	cvt.u64.u32	%rd35, %r122;
	mov.u64 	%rd38, rnd_seeds;
	cvta.global.u64 	%rd33, %rd38;
	// inline asm
	call (%rd32), _rt_buffer_get_64, (%rd33, %r278, %r279, %rd34, %rd35, %rd21, %rd21);
	// inline asm
	ld.global.u32 	%r281, [samples];
	setp.lt.s32	%p12, %r281, 1;
	@%p12 bra 	BB0_6;

	mov.u32 	%r282, 0;
	cvt.rn.f32.s32	%f207, %r281;
	rcp.rn.f32 	%f25, %f207;
	ld.u32 	%r307, [%rd32];
	mul.f32 	%f26, %f585, 0f3456BF95;
	mul.f32 	%f27, %f586, 0f3456BF95;
	mul.f32 	%f28, %f587, 0f3456BF95;
	mul.f32 	%f208, %f23, %f152;
	mul.f32 	%f209, %f22, %f153;
	sub.f32 	%f29, %f209, %f208;
	mul.f32 	%f210, %f22, %f154;
	mul.f32 	%f211, %f24, %f152;
	sub.f32 	%f30, %f211, %f210;
	mul.f32 	%f212, %f24, %f153;
	mul.f32 	%f213, %f23, %f154;
	sub.f32 	%f31, %f213, %f212;
	mov.f32 	%f591, 0f00000000;
	abs.f32 	%f214, %f27;
	abs.f32 	%f215, %f26;
	max.f32 	%f216, %f215, %f214;
	abs.f32 	%f217, %f28;
	max.f32 	%f218, %f216, %f217;
	mov.f32 	%f592, %f591;
	mov.f32 	%f593, %f591;

BB0_8:
	setp.lt.s32	%p13, %r281, 1;
	@%p13 bra 	BB0_59;

	max.f32 	%f36, %f218, %f172;
	mov.u32 	%r284, 0;

BB0_10:
	cvt.rn.f32.s32	%f578, %r282;
	mad.lo.s32 	%r127, %r307, 1664525, 1013904223;
	and.b32  	%r128, %r127, 16777215;
	cvt.rn.f32.u32	%f220, %r128;
	fma.rn.f32 	%f221, %f220, 0f33800000, %f578;
	mul.f32 	%f222, %f25, %f221;
	mad.lo.s32 	%r307, %r127, 1664525, 1013904223;
	and.b32  	%r129, %r307, 16777215;
	cvt.rn.f32.u32	%f223, %r129;
	cvt.rn.f32.s32	%f224, %r284;
	fma.rn.f32 	%f225, %f223, 0f33800000, %f224;
	mul.f32 	%f226, %f25, %f225;
	sqrt.rn.f32 	%f40, %f222;
	mul.f32 	%f600, %f226, 0f40C90FDB;
	abs.f32 	%f42, %f600;
	setp.neu.f32	%p14, %f42, 0f7F800000;
	mov.f32 	%f594, %f600;
	@%p14 bra 	BB0_12;

	mov.f32 	%f227, 0f00000000;
	mul.rn.f32 	%f594, %f600, %f227;

BB0_12:
	mul.f32 	%f228, %f594, 0f3F22F983;
	cvt.rni.s32.f32	%r295, %f228;
	cvt.rn.f32.s32	%f229, %r295;
	neg.f32 	%f230, %f229;
	mov.f32 	%f231, 0f3FC90FDA;
	fma.rn.f32 	%f232, %f230, %f231, %f594;
	mov.f32 	%f233, 0f33A22168;
	fma.rn.f32 	%f234, %f230, %f233, %f232;
	mov.f32 	%f235, 0f27C234C5;
	fma.rn.f32 	%f595, %f230, %f235, %f234;
	abs.f32 	%f236, %f594;
	setp.leu.f32	%p15, %f236, 0f47CE4780;
	@%p15 bra 	BB0_23;

	add.u64 	%rd40, %SP, 0;
	cvta.to.local.u64 	%rd3, %rd40;
	mov.b32 	 %r13, %f594;
	shr.u32 	%r14, %r13, 23;
	shl.b32 	%r132, %r13, 8;
	or.b32  	%r15, %r132, -2147483648;
	mov.u32 	%r286, 0;
	mov.u64 	%rd101, 0;
	mov.u64 	%rd100, %rd3;
	mov.u32 	%r287, %r286;

BB0_14:
	.pragma "nounroll";
	shl.b64 	%rd41, %rd101, 2;
	mov.u64 	%rd42, __cudart_i2opi_f;
	add.s64 	%rd43, %rd42, %rd41;
	ld.const.u32 	%r135, [%rd43];
	// inline asm
	{
	mad.lo.cc.u32   %r133, %r135, %r15, %r287;
	madc.hi.u32     %r287, %r135, %r15,  0;
	}
	// inline asm
	st.local.u32 	[%rd100], %r133;
	add.s32 	%r286, %r286, 1;
	cvt.s64.s32	%rd101, %r286;
	mul.wide.s32 	%rd46, %r286, 4;
	add.s64 	%rd100, %rd3, %rd46;
	setp.ne.s32	%p16, %r286, 6;
	@%p16 bra 	BB0_14;

	and.b32  	%r138, %r14, 255;
	add.s32 	%r139, %r138, -128;
	shr.u32 	%r140, %r139, 5;
	and.b32  	%r20, %r13, -2147483648;
	cvta.to.local.u64 	%rd48, %rd40;
	st.local.u32 	[%rd48+24], %r287;
	mov.u32 	%r141, 6;
	sub.s32 	%r142, %r141, %r140;
	mul.wide.s32 	%rd49, %r142, 4;
	add.s64 	%rd8, %rd48, %rd49;
	ld.local.u32 	%r288, [%rd8];
	ld.local.u32 	%r289, [%rd8+-4];
	and.b32  	%r23, %r14, 31;
	setp.eq.s32	%p17, %r23, 0;
	@%p17 bra 	BB0_17;

	mov.u32 	%r143, 32;
	sub.s32 	%r144, %r143, %r23;
	shr.u32 	%r145, %r289, %r144;
	shl.b32 	%r146, %r288, %r23;
	add.s32 	%r288, %r145, %r146;
	ld.local.u32 	%r147, [%rd8+-8];
	shr.u32 	%r148, %r147, %r144;
	shl.b32 	%r149, %r289, %r23;
	add.s32 	%r289, %r148, %r149;

BB0_17:
	shr.u32 	%r150, %r289, 30;
	shl.b32 	%r151, %r288, 2;
	add.s32 	%r290, %r150, %r151;
	shl.b32 	%r29, %r289, 2;
	shr.u32 	%r152, %r290, 31;
	shr.u32 	%r153, %r288, 30;
	add.s32 	%r30, %r152, %r153;
	setp.eq.s32	%p18, %r152, 0;
	@%p18 bra 	BB0_18;
	bra.uni 	BB0_19;

BB0_18:
	mov.u32 	%r291, %r20;
	mov.u32 	%r292, %r29;
	bra.uni 	BB0_20;

BB0_19:
	not.b32 	%r154, %r290;
	neg.s32 	%r292, %r29;
	setp.eq.s32	%p19, %r29, 0;
	selp.u32	%r155, 1, 0, %p19;
	add.s32 	%r290, %r155, %r154;
	xor.b32  	%r291, %r20, -2147483648;

BB0_20:
	clz.b32 	%r294, %r290;
	setp.eq.s32	%p20, %r294, 0;
	shl.b32 	%r156, %r290, %r294;
	mov.u32 	%r157, 32;
	sub.s32 	%r158, %r157, %r294;
	shr.u32 	%r159, %r292, %r158;
	add.s32 	%r160, %r159, %r156;
	selp.b32	%r38, %r290, %r160, %p20;
	mov.u32 	%r161, -921707870;
	mul.hi.u32 	%r293, %r38, %r161;
	setp.eq.s32	%p21, %r20, 0;
	neg.s32 	%r162, %r30;
	selp.b32	%r295, %r30, %r162, %p21;
	setp.lt.s32	%p22, %r293, 1;
	@%p22 bra 	BB0_22;

	mul.lo.s32 	%r163, %r38, -921707870;
	shr.u32 	%r164, %r163, 31;
	shl.b32 	%r165, %r293, 1;
	add.s32 	%r293, %r164, %r165;
	add.s32 	%r294, %r294, 1;

BB0_22:
	mov.u32 	%r166, 126;
	sub.s32 	%r167, %r166, %r294;
	shl.b32 	%r168, %r167, 23;
	add.s32 	%r169, %r293, 1;
	shr.u32 	%r170, %r169, 7;
	add.s32 	%r171, %r170, 1;
	shr.u32 	%r172, %r171, 1;
	add.s32 	%r173, %r172, %r168;
	or.b32  	%r174, %r173, %r291;
	mov.b32 	 %f595, %r174;

BB0_23:
	mul.rn.f32 	%f48, %f595, %f595;
	add.s32 	%r46, %r295, 1;
	and.b32  	%r47, %r46, 1;
	setp.eq.s32	%p23, %r47, 0;
	@%p23 bra 	BB0_25;
	bra.uni 	BB0_24;

BB0_25:
	mov.f32 	%f239, 0f3C08839E;
	mov.f32 	%f240, 0fB94CA1F9;
	fma.rn.f32 	%f596, %f240, %f48, %f239;
	bra.uni 	BB0_26;

BB0_24:
	mov.f32 	%f237, 0fBAB6061A;
	mov.f32 	%f238, 0f37CCF5CE;
	fma.rn.f32 	%f596, %f238, %f48, %f237;

BB0_26:
	@%p23 bra 	BB0_28;
	bra.uni 	BB0_27;

BB0_28:
	mov.f32 	%f244, 0fBE2AAAA3;
	fma.rn.f32 	%f245, %f596, %f48, %f244;
	mov.f32 	%f246, 0f00000000;
	fma.rn.f32 	%f597, %f245, %f48, %f246;
	bra.uni 	BB0_29;

BB0_27:
	mov.f32 	%f241, 0f3D2AAAA5;
	fma.rn.f32 	%f242, %f596, %f48, %f241;
	mov.f32 	%f243, 0fBF000000;
	fma.rn.f32 	%f597, %f242, %f48, %f243;

BB0_29:
	fma.rn.f32 	%f598, %f597, %f595, %f595;
	@%p23 bra 	BB0_31;

	mov.f32 	%f247, 0f3F800000;
	fma.rn.f32 	%f598, %f597, %f48, %f247;

BB0_31:
	and.b32  	%r175, %r46, 2;
	setp.eq.s32	%p26, %r175, 0;
	@%p26 bra 	BB0_33;

	mov.f32 	%f248, 0f00000000;
	mov.f32 	%f249, 0fBF800000;
	fma.rn.f32 	%f598, %f598, %f249, %f248;

BB0_33:
	@%p14 bra 	BB0_35;

	mov.f32 	%f250, 0f00000000;
	mul.rn.f32 	%f600, %f600, %f250;

BB0_35:
	mul.f32 	%f251, %f600, 0f3F22F983;
	cvt.rni.s32.f32	%r305, %f251;
	cvt.rn.f32.s32	%f252, %r305;
	neg.f32 	%f253, %f252;
	fma.rn.f32 	%f255, %f253, %f231, %f600;
	fma.rn.f32 	%f257, %f253, %f233, %f255;
	fma.rn.f32 	%f601, %f253, %f235, %f257;
	abs.f32 	%f259, %f600;
	setp.leu.f32	%p28, %f259, 0f47CE4780;
	@%p28 bra 	BB0_46;

	add.u64 	%rd51, %SP, 0;
	cvta.to.local.u64 	%rd9, %rd51;
	mov.b32 	 %r49, %f600;
	shr.u32 	%r50, %r49, 23;
	shl.b32 	%r178, %r49, 8;
	or.b32  	%r51, %r178, -2147483648;
	mov.u32 	%r296, 0;
	mov.u64 	%rd102, %rd9;
	mov.u64 	%rd103, %rd21;
	mov.u32 	%r297, %r296;

BB0_37:
	.pragma "nounroll";
	shl.b64 	%rd52, %rd103, 2;
	mov.u64 	%rd53, __cudart_i2opi_f;
	add.s64 	%rd54, %rd53, %rd52;
	ld.const.u32 	%r181, [%rd54];
	// inline asm
	{
	mad.lo.cc.u32   %r179, %r181, %r51, %r297;
	madc.hi.u32     %r297, %r181, %r51,  0;
	}
	// inline asm
	st.local.u32 	[%rd102], %r179;
	add.s32 	%r296, %r296, 1;
	cvt.s64.s32	%rd103, %r296;
	mul.wide.s32 	%rd55, %r296, 4;
	add.s64 	%rd102, %rd9, %rd55;
	setp.ne.s32	%p29, %r296, 6;
	@%p29 bra 	BB0_37;

	and.b32  	%r184, %r50, 255;
	add.s32 	%r185, %r184, -128;
	shr.u32 	%r186, %r185, 5;
	and.b32  	%r56, %r49, -2147483648;
	cvta.to.local.u64 	%rd57, %rd51;
	st.local.u32 	[%rd57+24], %r297;
	mov.u32 	%r187, 6;
	sub.s32 	%r188, %r187, %r186;
	mul.wide.s32 	%rd58, %r188, 4;
	add.s64 	%rd15, %rd57, %rd58;
	ld.local.u32 	%r298, [%rd15];
	ld.local.u32 	%r299, [%rd15+-4];
	and.b32  	%r59, %r50, 31;
	setp.eq.s32	%p30, %r59, 0;
	@%p30 bra 	BB0_40;

	mov.u32 	%r189, 32;
	sub.s32 	%r190, %r189, %r59;
	shr.u32 	%r191, %r299, %r190;
	shl.b32 	%r192, %r298, %r59;
	add.s32 	%r298, %r191, %r192;
	ld.local.u32 	%r193, [%rd15+-8];
	shr.u32 	%r194, %r193, %r190;
	shl.b32 	%r195, %r299, %r59;
	add.s32 	%r299, %r194, %r195;

BB0_40:
	shr.u32 	%r196, %r299, 30;
	shl.b32 	%r197, %r298, 2;
	add.s32 	%r300, %r196, %r197;
	shl.b32 	%r65, %r299, 2;
	shr.u32 	%r198, %r300, 31;
	shr.u32 	%r199, %r298, 30;
	add.s32 	%r66, %r198, %r199;
	setp.eq.s32	%p31, %r198, 0;
	@%p31 bra 	BB0_41;
	bra.uni 	BB0_42;

BB0_41:
	mov.u32 	%r301, %r56;
	mov.u32 	%r302, %r65;
	bra.uni 	BB0_43;

BB0_42:
	not.b32 	%r200, %r300;
	neg.s32 	%r302, %r65;
	setp.eq.s32	%p32, %r65, 0;
	selp.u32	%r201, 1, 0, %p32;
	add.s32 	%r300, %r201, %r200;
	xor.b32  	%r301, %r56, -2147483648;

BB0_43:
	clz.b32 	%r304, %r300;
	setp.eq.s32	%p33, %r304, 0;
	shl.b32 	%r202, %r300, %r304;
	mov.u32 	%r203, 32;
	sub.s32 	%r204, %r203, %r304;
	shr.u32 	%r205, %r302, %r204;
	add.s32 	%r206, %r205, %r202;
	selp.b32	%r74, %r300, %r206, %p33;
	mov.u32 	%r207, -921707870;
	mul.hi.u32 	%r303, %r74, %r207;
	setp.eq.s32	%p34, %r56, 0;
	neg.s32 	%r208, %r66;
	selp.b32	%r305, %r66, %r208, %p34;
	setp.lt.s32	%p35, %r303, 1;
	@%p35 bra 	BB0_45;

	mul.lo.s32 	%r209, %r74, -921707870;
	shr.u32 	%r210, %r209, 31;
	shl.b32 	%r211, %r303, 1;
	add.s32 	%r303, %r210, %r211;
	add.s32 	%r304, %r304, 1;

BB0_45:
	mov.u32 	%r212, 126;
	sub.s32 	%r213, %r212, %r304;
	shl.b32 	%r214, %r213, 23;
	add.s32 	%r215, %r303, 1;
	shr.u32 	%r216, %r215, 7;
	add.s32 	%r217, %r216, 1;
	shr.u32 	%r218, %r217, 1;
	add.s32 	%r219, %r218, %r214;
	or.b32  	%r220, %r219, %r301;
	mov.b32 	 %f601, %r220;

BB0_46:
	mul.rn.f32 	%f65, %f601, %f601;
	and.b32  	%r82, %r305, 1;
	setp.eq.s32	%p36, %r82, 0;
	@%p36 bra 	BB0_48;
	bra.uni 	BB0_47;

BB0_48:
	mov.f32 	%f262, 0f3C08839E;
	mov.f32 	%f263, 0fB94CA1F9;
	fma.rn.f32 	%f602, %f263, %f65, %f262;
	bra.uni 	BB0_49;

BB0_47:
	mov.f32 	%f260, 0fBAB6061A;
	mov.f32 	%f261, 0f37CCF5CE;
	fma.rn.f32 	%f602, %f261, %f65, %f260;

BB0_49:
	@%p36 bra 	BB0_51;
	bra.uni 	BB0_50;

BB0_51:
	mov.f32 	%f267, 0fBE2AAAA3;
	fma.rn.f32 	%f268, %f602, %f65, %f267;
	mov.f32 	%f269, 0f00000000;
	fma.rn.f32 	%f603, %f268, %f65, %f269;
	bra.uni 	BB0_52;

BB0_50:
	mov.f32 	%f264, 0f3D2AAAA5;
	fma.rn.f32 	%f265, %f602, %f65, %f264;
	mov.f32 	%f266, 0fBF000000;
	fma.rn.f32 	%f603, %f265, %f65, %f266;

BB0_52:
	fma.rn.f32 	%f604, %f603, %f601, %f601;
	@%p36 bra 	BB0_54;

	mov.f32 	%f270, 0f3F800000;
	fma.rn.f32 	%f604, %f603, %f65, %f270;

BB0_54:
	and.b32  	%r221, %r305, 2;
	setp.eq.s32	%p39, %r221, 0;
	@%p39 bra 	BB0_56;

	mov.f32 	%f271, 0f00000000;
	mov.f32 	%f272, 0fBF800000;
	fma.rn.f32 	%f604, %f604, %f272, %f271;

BB0_56:
	mul.f32 	%f281, %f40, %f598;
	mul.f32 	%f282, %f281, %f281;
	mov.f32 	%f283, 0f3F800000;
	sub.f32 	%f284, %f283, %f282;
	mul.f32 	%f285, %f40, %f604;
	mul.f32 	%f286, %f285, %f285;
	sub.f32 	%f287, %f284, %f286;
	mov.f32 	%f288, 0f00000000;
	max.f32 	%f289, %f288, %f287;
	sqrt.rn.f32 	%f290, %f289;
	mul.f32 	%f291, %f22, %f285;
	mul.f32 	%f292, %f23, %f285;
	mul.f32 	%f293, %f24, %f285;
	fma.rn.f32 	%f294, %f31, %f281, %f291;
	fma.rn.f32 	%f295, %f30, %f281, %f292;
	fma.rn.f32 	%f296, %f29, %f281, %f293;
	fma.rn.f32 	%f276, %f290, %f152, %f294;
	fma.rn.f32 	%f277, %f290, %f153, %f295;
	fma.rn.f32 	%f278, %f290, %f154, %f296;
	mov.u32 	%r225, -1082130432;
	st.local.u32 	[%rd31+8], %r225;
	st.local.u32 	[%rd31+4], %r225;
	st.local.u32 	[%rd31], %r225;
	ld.global.u32 	%r222, [root];
	mov.u32 	%r223, 0;
	// inline asm
	call _rt_trace_64, (%r222, %f585, %f586, %f587, %f276, %f277, %f278, %r223, %f36, %f156, %rd29, %r114);
	// inline asm
	ld.local.f32 	%f77, [%rd31];
	setp.lt.f32	%p40, %f77, 0f00000000;
	@%p40 bra 	BB0_58;

	add.f32 	%f593, %f593, %f77;
	ld.local.f32 	%f297, [%rd31+4];
	add.f32 	%f592, %f592, %f297;
	ld.local.f32 	%f298, [%rd31+8];
	add.f32 	%f591, %f591, %f298;

BB0_58:
	ld.global.u32 	%r281, [samples];
	add.s32 	%r284, %r284, 1;
	setp.lt.s32	%p41, %r284, %r281;
	@%p41 bra 	BB0_10;

BB0_59:
	add.s32 	%r282, %r282, 1;
	setp.lt.s32	%p42, %r282, %r281;
	@%p42 bra 	BB0_8;
	bra.uni 	BB0_60;

BB0_6:
	mov.f32 	%f592, %f591;
	mov.f32 	%f593, %f591;

BB0_60:
	mul.lo.s32 	%r226, %r281, %r281;
	cvt.rn.f32.s32	%f299, %r226;
	rcp.rn.f32 	%f300, %f299;
	mul.f32 	%f90, %f593, %f300;
	mul.f32 	%f91, %f592, %f300;
	mul.f32 	%f92, %f591, %f300;
	ld.global.u32 	%r309, [imageEnabled];
	and.b32  	%r227, %r309, 1;
	setp.eq.b32	%p43, %r227, 1;
	@!%p43 bra 	BB0_95;
	bra.uni 	BB0_61;

BB0_61:
	mov.f32 	%f303, 0f3E666666;
	cvt.rzi.f32.f32	%f304, %f303;
	fma.rn.f32 	%f305, %f304, 0fC0000000, 0f3EE66666;
	abs.f32 	%f93, %f305;
	abs.f32 	%f94, %f90;
	setp.lt.f32	%p44, %f94, 0f00800000;
	mul.f32 	%f306, %f94, 0f4B800000;
	selp.f32	%f307, 0fC3170000, 0fC2FE0000, %p44;
	selp.f32	%f308, %f306, %f94, %p44;
	mov.b32 	 %r228, %f308;
	and.b32  	%r229, %r228, 8388607;
	or.b32  	%r230, %r229, 1065353216;
	mov.b32 	 %f309, %r230;
	shr.u32 	%r231, %r228, 23;
	cvt.rn.f32.u32	%f310, %r231;
	add.f32 	%f311, %f307, %f310;
	setp.gt.f32	%p45, %f309, 0f3FB504F3;
	mul.f32 	%f312, %f309, 0f3F000000;
	add.f32 	%f313, %f311, 0f3F800000;
	selp.f32	%f314, %f312, %f309, %p45;
	selp.f32	%f315, %f313, %f311, %p45;
	add.f32 	%f316, %f314, 0fBF800000;
	add.f32 	%f302, %f314, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f301,%f302;
	// inline asm
	add.f32 	%f317, %f316, %f316;
	mul.f32 	%f318, %f301, %f317;
	mul.f32 	%f319, %f318, %f318;
	mov.f32 	%f320, 0f3C4CAF63;
	mov.f32 	%f321, 0f3B18F0FE;
	fma.rn.f32 	%f322, %f321, %f319, %f320;
	mov.f32 	%f323, 0f3DAAAABD;
	fma.rn.f32 	%f324, %f322, %f319, %f323;
	mul.rn.f32 	%f325, %f324, %f319;
	mul.rn.f32 	%f326, %f325, %f318;
	sub.f32 	%f327, %f316, %f318;
	neg.f32 	%f328, %f318;
	add.f32 	%f329, %f327, %f327;
	fma.rn.f32 	%f330, %f328, %f316, %f329;
	mul.rn.f32 	%f331, %f301, %f330;
	add.f32 	%f332, %f326, %f318;
	sub.f32 	%f333, %f318, %f332;
	add.f32 	%f334, %f326, %f333;
	add.f32 	%f335, %f331, %f334;
	add.f32 	%f336, %f332, %f335;
	sub.f32 	%f337, %f332, %f336;
	add.f32 	%f338, %f335, %f337;
	mov.f32 	%f339, 0f3F317200;
	mul.rn.f32 	%f340, %f315, %f339;
	mov.f32 	%f341, 0f35BFBE8E;
	mul.rn.f32 	%f342, %f315, %f341;
	add.f32 	%f343, %f340, %f336;
	sub.f32 	%f344, %f340, %f343;
	add.f32 	%f345, %f336, %f344;
	add.f32 	%f346, %f338, %f345;
	add.f32 	%f347, %f342, %f346;
	add.f32 	%f348, %f343, %f347;
	sub.f32 	%f349, %f343, %f348;
	add.f32 	%f350, %f347, %f349;
	mov.f32 	%f351, 0f3EE66666;
	mul.rn.f32 	%f352, %f351, %f348;
	neg.f32 	%f353, %f352;
	fma.rn.f32 	%f354, %f351, %f348, %f353;
	fma.rn.f32 	%f355, %f351, %f350, %f354;
	mov.f32 	%f356, 0f00000000;
	fma.rn.f32 	%f357, %f356, %f348, %f355;
	add.rn.f32 	%f358, %f352, %f357;
	neg.f32 	%f359, %f358;
	add.rn.f32 	%f360, %f352, %f359;
	add.rn.f32 	%f361, %f360, %f357;
	mov.b32 	 %r232, %f358;
	setp.eq.s32	%p46, %r232, 1118925336;
	add.s32 	%r233, %r232, -1;
	mov.b32 	 %f362, %r233;
	add.f32 	%f363, %f361, 0f37000000;
	selp.f32	%f364, %f362, %f358, %p46;
	selp.f32	%f95, %f363, %f361, %p46;
	mul.f32 	%f365, %f364, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f366, %f365;
	mov.f32 	%f367, 0fBF317200;
	fma.rn.f32 	%f368, %f366, %f367, %f364;
	mov.f32 	%f369, 0fB5BFBE8E;
	fma.rn.f32 	%f370, %f366, %f369, %f368;
	mul.f32 	%f371, %f370, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f372, %f371;
	add.f32 	%f373, %f366, 0f00000000;
	ex2.approx.f32 	%f374, %f373;
	mul.f32 	%f375, %f372, %f374;
	setp.lt.f32	%p47, %f364, 0fC2D20000;
	selp.f32	%f376, 0f00000000, %f375, %p47;
	setp.gt.f32	%p48, %f364, 0f42D20000;
	selp.f32	%f615, 0f7F800000, %f376, %p48;
	setp.eq.f32	%p49, %f615, 0f7F800000;
	@%p49 bra 	BB0_63;

	fma.rn.f32 	%f615, %f615, %f95, %f615;

BB0_63:
	setp.lt.f32	%p50, %f90, 0f00000000;
	setp.eq.f32	%p51, %f93, 0f3F800000;
	and.pred  	%p1, %p50, %p51;
	mov.b32 	 %r234, %f615;
	xor.b32  	%r235, %r234, -2147483648;
	mov.b32 	 %f377, %r235;
	selp.f32	%f617, %f377, %f615, %p1;
	setp.eq.f32	%p52, %f90, 0f00000000;
	@%p52 bra 	BB0_66;
	bra.uni 	BB0_64;

BB0_66:
	add.f32 	%f380, %f90, %f90;
	selp.f32	%f617, %f380, 0f00000000, %p51;
	bra.uni 	BB0_67;

BB0_64:
	setp.geu.f32	%p53, %f90, 0f00000000;
	@%p53 bra 	BB0_67;

	cvt.rzi.f32.f32	%f379, %f351;
	setp.neu.f32	%p54, %f379, 0f3EE66666;
	selp.f32	%f617, 0f7FFFFFFF, %f617, %p54;

BB0_67:
	abs.f32 	%f553, %f90;
	add.f32 	%f381, %f553, 0f3EE66666;
	mov.b32 	 %r236, %f381;
	setp.lt.s32	%p56, %r236, 2139095040;
	@%p56 bra 	BB0_72;

	abs.f32 	%f570, %f90;
	setp.gtu.f32	%p57, %f570, 0f7F800000;
	@%p57 bra 	BB0_71;
	bra.uni 	BB0_69;

BB0_71:
	add.f32 	%f617, %f90, 0f3EE66666;
	bra.uni 	BB0_72;

BB0_69:
	abs.f32 	%f571, %f90;
	setp.neu.f32	%p58, %f571, 0f7F800000;
	@%p58 bra 	BB0_72;

	selp.f32	%f617, 0fFF800000, 0f7F800000, %p1;

BB0_72:
	mov.f32 	%f561, 0fB5BFBE8E;
	mov.f32 	%f560, 0fBF317200;
	mov.f32 	%f559, 0f00000000;
	mov.f32 	%f558, 0f35BFBE8E;
	mov.f32 	%f557, 0f3F317200;
	mov.f32 	%f556, 0f3DAAAABD;
	mov.f32 	%f555, 0f3C4CAF63;
	mov.f32 	%f554, 0f3B18F0FE;
	setp.eq.f32	%p59, %f90, 0f3F800000;
	selp.f32	%f106, 0f3F800000, %f617, %p59;
	abs.f32 	%f107, %f91;
	setp.lt.f32	%p60, %f107, 0f00800000;
	mul.f32 	%f384, %f107, 0f4B800000;
	selp.f32	%f385, 0fC3170000, 0fC2FE0000, %p60;
	selp.f32	%f386, %f384, %f107, %p60;
	mov.b32 	 %r237, %f386;
	and.b32  	%r238, %r237, 8388607;
	or.b32  	%r239, %r238, 1065353216;
	mov.b32 	 %f387, %r239;
	shr.u32 	%r240, %r237, 23;
	cvt.rn.f32.u32	%f388, %r240;
	add.f32 	%f389, %f385, %f388;
	setp.gt.f32	%p61, %f387, 0f3FB504F3;
	mul.f32 	%f390, %f387, 0f3F000000;
	add.f32 	%f391, %f389, 0f3F800000;
	selp.f32	%f392, %f390, %f387, %p61;
	selp.f32	%f393, %f391, %f389, %p61;
	add.f32 	%f394, %f392, 0fBF800000;
	add.f32 	%f383, %f392, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f382,%f383;
	// inline asm
	add.f32 	%f395, %f394, %f394;
	mul.f32 	%f396, %f382, %f395;
	mul.f32 	%f397, %f396, %f396;
	fma.rn.f32 	%f400, %f554, %f397, %f555;
	fma.rn.f32 	%f402, %f400, %f397, %f556;
	mul.rn.f32 	%f403, %f402, %f397;
	mul.rn.f32 	%f404, %f403, %f396;
	sub.f32 	%f405, %f394, %f396;
	neg.f32 	%f406, %f396;
	add.f32 	%f407, %f405, %f405;
	fma.rn.f32 	%f408, %f406, %f394, %f407;
	mul.rn.f32 	%f409, %f382, %f408;
	add.f32 	%f410, %f404, %f396;
	sub.f32 	%f411, %f396, %f410;
	add.f32 	%f412, %f404, %f411;
	add.f32 	%f413, %f409, %f412;
	add.f32 	%f414, %f410, %f413;
	sub.f32 	%f415, %f410, %f414;
	add.f32 	%f416, %f413, %f415;
	mul.rn.f32 	%f418, %f393, %f557;
	mul.rn.f32 	%f420, %f393, %f558;
	add.f32 	%f421, %f418, %f414;
	sub.f32 	%f422, %f418, %f421;
	add.f32 	%f423, %f414, %f422;
	add.f32 	%f424, %f416, %f423;
	add.f32 	%f425, %f420, %f424;
	add.f32 	%f426, %f421, %f425;
	sub.f32 	%f427, %f421, %f426;
	add.f32 	%f428, %f425, %f427;
	mul.rn.f32 	%f430, %f351, %f426;
	neg.f32 	%f431, %f430;
	fma.rn.f32 	%f432, %f351, %f426, %f431;
	fma.rn.f32 	%f433, %f351, %f428, %f432;
	fma.rn.f32 	%f435, %f559, %f426, %f433;
	add.rn.f32 	%f436, %f430, %f435;
	neg.f32 	%f437, %f436;
	add.rn.f32 	%f438, %f430, %f437;
	add.rn.f32 	%f439, %f438, %f435;
	mov.b32 	 %r241, %f436;
	setp.eq.s32	%p62, %r241, 1118925336;
	add.s32 	%r242, %r241, -1;
	mov.b32 	 %f440, %r242;
	add.f32 	%f441, %f439, 0f37000000;
	selp.f32	%f442, %f440, %f436, %p62;
	selp.f32	%f108, %f441, %f439, %p62;
	mul.f32 	%f443, %f442, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f444, %f443;
	fma.rn.f32 	%f446, %f444, %f560, %f442;
	fma.rn.f32 	%f448, %f444, %f561, %f446;
	mul.f32 	%f449, %f448, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f450, %f449;
	add.f32 	%f451, %f444, 0f00000000;
	ex2.approx.f32 	%f452, %f451;
	mul.f32 	%f453, %f450, %f452;
	setp.lt.f32	%p63, %f442, 0fC2D20000;
	selp.f32	%f454, 0f00000000, %f453, %p63;
	setp.gt.f32	%p64, %f442, 0f42D20000;
	selp.f32	%f618, 0f7F800000, %f454, %p64;
	setp.eq.f32	%p65, %f618, 0f7F800000;
	@%p65 bra 	BB0_74;

	fma.rn.f32 	%f618, %f618, %f108, %f618;

BB0_74:
	setp.lt.f32	%p66, %f91, 0f00000000;
	and.pred  	%p2, %p66, %p51;
	mov.b32 	 %r243, %f618;
	xor.b32  	%r244, %r243, -2147483648;
	mov.b32 	 %f455, %r244;
	selp.f32	%f620, %f455, %f618, %p2;
	setp.eq.f32	%p68, %f91, 0f00000000;
	@%p68 bra 	BB0_77;
	bra.uni 	BB0_75;

BB0_77:
	add.f32 	%f458, %f91, %f91;
	selp.f32	%f620, %f458, 0f00000000, %p51;
	bra.uni 	BB0_78;

BB0_75:
	setp.geu.f32	%p69, %f91, 0f00000000;
	@%p69 bra 	BB0_78;

	mov.f32 	%f577, 0f3EE66666;
	cvt.rzi.f32.f32	%f457, %f577;
	setp.neu.f32	%p70, %f457, 0f3EE66666;
	selp.f32	%f620, 0f7FFFFFFF, %f620, %p70;

BB0_78:
	abs.f32 	%f572, %f91;
	add.f32 	%f459, %f572, 0f3EE66666;
	mov.b32 	 %r245, %f459;
	setp.lt.s32	%p72, %r245, 2139095040;
	@%p72 bra 	BB0_83;

	abs.f32 	%f575, %f91;
	setp.gtu.f32	%p73, %f575, 0f7F800000;
	@%p73 bra 	BB0_82;
	bra.uni 	BB0_80;

BB0_82:
	add.f32 	%f620, %f91, 0f3EE66666;
	bra.uni 	BB0_83;

BB0_80:
	abs.f32 	%f576, %f91;
	setp.neu.f32	%p74, %f576, 0f7F800000;
	@%p74 bra 	BB0_83;

	selp.f32	%f620, 0fFF800000, 0f7F800000, %p2;

BB0_83:
	mov.f32 	%f573, 0f3EE66666;
	mov.f32 	%f569, 0fB5BFBE8E;
	mov.f32 	%f568, 0fBF317200;
	mov.f32 	%f567, 0f00000000;
	mov.f32 	%f566, 0f35BFBE8E;
	mov.f32 	%f565, 0f3F317200;
	mov.f32 	%f564, 0f3DAAAABD;
	mov.f32 	%f563, 0f3C4CAF63;
	mov.f32 	%f562, 0f3B18F0FE;
	setp.eq.f32	%p75, %f91, 0f3F800000;
	selp.f32	%f119, 0f3F800000, %f620, %p75;
	abs.f32 	%f120, %f92;
	setp.lt.f32	%p76, %f120, 0f00800000;
	mul.f32 	%f462, %f120, 0f4B800000;
	selp.f32	%f463, 0fC3170000, 0fC2FE0000, %p76;
	selp.f32	%f464, %f462, %f120, %p76;
	mov.b32 	 %r246, %f464;
	and.b32  	%r247, %r246, 8388607;
	or.b32  	%r248, %r247, 1065353216;
	mov.b32 	 %f465, %r248;
	shr.u32 	%r249, %r246, 23;
	cvt.rn.f32.u32	%f466, %r249;
	add.f32 	%f467, %f463, %f466;
	setp.gt.f32	%p77, %f465, 0f3FB504F3;
	mul.f32 	%f468, %f465, 0f3F000000;
	add.f32 	%f469, %f467, 0f3F800000;
	selp.f32	%f470, %f468, %f465, %p77;
	selp.f32	%f471, %f469, %f467, %p77;
	add.f32 	%f472, %f470, 0fBF800000;
	add.f32 	%f461, %f470, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f460,%f461;
	// inline asm
	add.f32 	%f473, %f472, %f472;
	mul.f32 	%f474, %f460, %f473;
	mul.f32 	%f475, %f474, %f474;
	fma.rn.f32 	%f478, %f562, %f475, %f563;
	fma.rn.f32 	%f480, %f478, %f475, %f564;
	mul.rn.f32 	%f481, %f480, %f475;
	mul.rn.f32 	%f482, %f481, %f474;
	sub.f32 	%f483, %f472, %f474;
	neg.f32 	%f484, %f474;
	add.f32 	%f485, %f483, %f483;
	fma.rn.f32 	%f486, %f484, %f472, %f485;
	mul.rn.f32 	%f487, %f460, %f486;
	add.f32 	%f488, %f482, %f474;
	sub.f32 	%f489, %f474, %f488;
	add.f32 	%f490, %f482, %f489;
	add.f32 	%f491, %f487, %f490;
	add.f32 	%f492, %f488, %f491;
	sub.f32 	%f493, %f488, %f492;
	add.f32 	%f494, %f491, %f493;
	mul.rn.f32 	%f496, %f471, %f565;
	mul.rn.f32 	%f498, %f471, %f566;
	add.f32 	%f499, %f496, %f492;
	sub.f32 	%f500, %f496, %f499;
	add.f32 	%f501, %f492, %f500;
	add.f32 	%f502, %f494, %f501;
	add.f32 	%f503, %f498, %f502;
	add.f32 	%f504, %f499, %f503;
	sub.f32 	%f505, %f499, %f504;
	add.f32 	%f506, %f503, %f505;
	mul.rn.f32 	%f508, %f573, %f504;
	neg.f32 	%f509, %f508;
	fma.rn.f32 	%f510, %f573, %f504, %f509;
	fma.rn.f32 	%f511, %f573, %f506, %f510;
	fma.rn.f32 	%f513, %f567, %f504, %f511;
	add.rn.f32 	%f514, %f508, %f513;
	neg.f32 	%f515, %f514;
	add.rn.f32 	%f516, %f508, %f515;
	add.rn.f32 	%f517, %f516, %f513;
	mov.b32 	 %r250, %f514;
	setp.eq.s32	%p78, %r250, 1118925336;
	add.s32 	%r251, %r250, -1;
	mov.b32 	 %f518, %r251;
	add.f32 	%f519, %f517, 0f37000000;
	selp.f32	%f520, %f518, %f514, %p78;
	selp.f32	%f121, %f519, %f517, %p78;
	mul.f32 	%f521, %f520, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f522, %f521;
	fma.rn.f32 	%f524, %f522, %f568, %f520;
	fma.rn.f32 	%f526, %f522, %f569, %f524;
	mul.f32 	%f527, %f526, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f528, %f527;
	add.f32 	%f529, %f522, 0f00000000;
	ex2.approx.f32 	%f530, %f529;
	mul.f32 	%f531, %f528, %f530;
	setp.lt.f32	%p79, %f520, 0fC2D20000;
	selp.f32	%f532, 0f00000000, %f531, %p79;
	setp.gt.f32	%p80, %f520, 0f42D20000;
	selp.f32	%f621, 0f7F800000, %f532, %p80;
	setp.eq.f32	%p81, %f621, 0f7F800000;
	@%p81 bra 	BB0_85;

	fma.rn.f32 	%f621, %f621, %f121, %f621;

BB0_85:
	setp.lt.f32	%p82, %f92, 0f00000000;
	and.pred  	%p3, %p82, %p51;
	mov.b32 	 %r252, %f621;
	xor.b32  	%r253, %r252, -2147483648;
	mov.b32 	 %f533, %r253;
	selp.f32	%f623, %f533, %f621, %p3;
	setp.eq.f32	%p84, %f92, 0f00000000;
	@%p84 bra 	BB0_88;
	bra.uni 	BB0_86;

BB0_88:
	add.f32 	%f536, %f92, %f92;
	selp.f32	%f623, %f536, 0f00000000, %p51;
	bra.uni 	BB0_89;

BB0_86:
	setp.geu.f32	%p85, %f92, 0f00000000;
	@%p85 bra 	BB0_89;

	mov.f32 	%f574, 0f3EE66666;
	cvt.rzi.f32.f32	%f535, %f574;
	setp.neu.f32	%p86, %f535, 0f3EE66666;
	selp.f32	%f623, 0f7FFFFFFF, %f623, %p86;

BB0_89:
	abs.f32 	%f579, %f92;
	add.f32 	%f537, %f579, 0f3EE66666;
	mov.b32 	 %r254, %f537;
	setp.lt.s32	%p88, %r254, 2139095040;
	@%p88 bra 	BB0_94;

	abs.f32 	%f580, %f92;
	setp.gtu.f32	%p89, %f580, 0f7F800000;
	@%p89 bra 	BB0_93;
	bra.uni 	BB0_91;

BB0_93:
	add.f32 	%f623, %f92, 0f3EE66666;
	bra.uni 	BB0_94;

BB0_91:
	abs.f32 	%f581, %f92;
	setp.neu.f32	%p90, %f581, 0f7F800000;
	@%p90 bra 	BB0_94;

	selp.f32	%f623, 0fFF800000, 0f7F800000, %p3;

BB0_94:
	mov.u32 	%r276, 4;
	mov.u64 	%rd98, 0;
	mov.u32 	%r275, 2;
	setp.eq.f32	%p91, %f92, 0f3F800000;
	selp.f32	%f538, 0f3F800000, %f623, %p91;
	cvt.u64.u32	%rd66, %r3;
	cvt.u64.u32	%rd65, %r2;
	mov.u64 	%rd69, image;
	cvta.global.u64 	%rd64, %rd69;
	// inline asm
	call (%rd63), _rt_buffer_get_64, (%rd64, %r275, %r276, %rd65, %rd66, %rd98, %rd98);
	// inline asm
	cvt.sat.f32.f32	%f539, %f538;
	mul.f32 	%f540, %f539, 0f437FFD71;
	cvt.rzi.u32.f32	%r257, %f540;
	cvt.sat.f32.f32	%f541, %f119;
	mul.f32 	%f542, %f541, 0f437FFD71;
	cvt.rzi.u32.f32	%r258, %f542;
	cvt.sat.f32.f32	%f543, %f106;
	mul.f32 	%f544, %f543, 0f437FFD71;
	cvt.rzi.u32.f32	%r259, %f544;
	cvt.u16.u32	%rs9, %r257;
	cvt.u16.u32	%rs10, %r259;
	cvt.u16.u32	%rs11, %r258;
	mov.u16 	%rs12, 255;
	st.v4.u8 	[%rd63], {%rs9, %rs11, %rs10, %rs12};
	ld.global.u32 	%r309, [imageEnabled];

BB0_95:
	and.b32  	%r260, %r309, 4;
	setp.eq.s32	%p92, %r260, 0;
	@%p92 bra 	BB0_101;

	mov.u64 	%rd99, 0;
	mov.u32 	%r277, 2;
	ld.global.v2.u32 	{%r265, %r266}, [pixelID];
	cvt.u64.u32	%rd72, %r265;
	cvt.u64.u32	%rd73, %r266;
	mov.u64 	%rd82, lightmapDirect;
	cvta.global.u64 	%rd71, %rd82;
	mov.u32 	%r264, 8;
	// inline asm
	call (%rd70), _rt_buffer_get_64, (%rd71, %r277, %r264, %rd72, %rd73, %rd99, %rd99);
	// inline asm
	ld.v4.u16 	{%rs20, %rs21, %rs22, %rs23}, [%rd70];
	// inline asm
	{  cvt.f32.f16 %f545, %rs20;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f546, %rs21;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f547, %rs22;}

	// inline asm
	add.f32 	%f548, %f90, %f545;
	add.f32 	%f549, %f91, %f546;
	add.f32 	%f550, %f92, %f547;
	cvt.u64.u32	%rd79, %r3;
	cvt.u64.u32	%rd78, %r2;
	mov.u64 	%rd83, image_HDR;
	cvta.global.u64 	%rd77, %rd83;
	// inline asm
	call (%rd76), _rt_buffer_get_64, (%rd77, %r277, %r264, %rd78, %rd79, %rd99, %rd99);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs18, %f550;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs17, %f549;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs16, %f548;}

	// inline asm
	mov.f32 	%f551, 0f3F800000;
	// inline asm
	{  cvt.rn.f16.f32 %rs19, %f551;}

	// inline asm
	st.v4.u16 	[%rd76], {%rs16, %rs17, %rs18, %rs19};

BB0_101:
	ret;
}