//
// Generated by NVIDIA NVVM Compiler
//
// Compiler Build ID: CL-23083092
// Cuda compilation tools, release 9.1, V9.1.85
// Based on LLVM 3.4svn
//

.version 6.1
.target sm_30
.address_size 64

	// .globl	_Z6oxMainv
.global .align 8 .b8 pixelID[8];
.global .align 8 .b8 resolution[8];
.global .align 4 .b8 normal[12];
.global .align 4 .b8 camPos[12];
.global .align 4 .b8 root[4];
.global .align 4 .u32 imageEnabled;
.global .texref lightmap;
.global .align 16 .b8 tileInfo[16];
.global .align 4 .u32 additive;
.global .align 1 .b8 image[1];
.global .align 1 .b8 image_HDR[1];
.global .align 1 .b8 image_HDR2[1];
.global .align 1 .b8 image_Mask[1];
.global .align 1 .b8 image_RNM0[1];
.global .align 1 .b8 image_RNM1[1];
.global .align 1 .b8 image_RNM2[1];
.global .align 1 .b8 image_RNM3[1];
.global .align 1 .b8 uvpos[1];
.global .align 1 .b8 uvnormal[1];
.global .align 1 .b8 lightMeshBuffer[1];
.global .align 4 .u32 lightMeshBufferSize;
.global .align 4 .f32 lightInvCutoff;
.global .align 4 .f32 lightPointSize;
.global .align 4 .b8 lightColor[12];
.global .align 1 .b8 rnd_seeds[1];
.global .align 4 .u32 samples;
.global .align 4 .b8 _ZN21rti_internal_typeinfo7pixelIDE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo10resolutionE[8] = {82, 97, 121, 0, 8, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6normalE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo6camPosE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo4rootE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo12imageEnabledE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8tileInfoE[8] = {82, 97, 121, 0, 16, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo8additiveE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo19lightMeshBufferSizeE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo14lightInvCutoffE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo14lightPointSizeE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo10lightColorE[8] = {82, 97, 121, 0, 12, 0, 0, 0};
.global .align 4 .b8 _ZN21rti_internal_typeinfo7samplesE[8] = {82, 97, 121, 0, 4, 0, 0, 0};
.global .align 8 .u64 _ZN21rti_internal_register20reg_bitness_detectorE;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail0E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail1E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail2E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail3E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail4E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail5E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail6E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail7E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail8E;
.global .align 8 .u64 _ZN21rti_internal_register24reg_exception_64_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail0E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail1E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail2E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail3E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail4E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail5E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail6E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail7E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail8E;
.global .align 4 .u32 _ZN21rti_internal_register21reg_exception_detail9E;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_xE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_yE;
.global .align 4 .u32 _ZN21rti_internal_register14reg_rayIndex_zE;
.global .align 8 .b8 _ZN21rti_internal_typename7pixelIDE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename10resolutionE[6] = {117, 105, 110, 116, 50, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6normalE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 8 .b8 _ZN21rti_internal_typename6camPosE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 16 .b8 _ZN21rti_internal_typename4rootE[9] = {114, 116, 79, 98, 106, 101, 99, 116, 0};
.global .align 4 .b8 _ZN21rti_internal_typename12imageEnabledE[4] = {105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename8tileInfoE[6] = {117, 105, 110, 116, 52, 0};
.global .align 4 .b8 _ZN21rti_internal_typename8additiveE[4] = {105, 110, 116, 0};
.global .align 16 .b8 _ZN21rti_internal_typename19lightMeshBufferSizeE[13] = {117, 110, 115, 105, 103, 110, 101, 100, 32, 105, 110, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename14lightInvCutoffE[6] = {102, 108, 111, 97, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename14lightPointSizeE[6] = {102, 108, 111, 97, 116, 0};
.global .align 8 .b8 _ZN21rti_internal_typename10lightColorE[7] = {102, 108, 111, 97, 116, 51, 0};
.global .align 4 .b8 _ZN21rti_internal_typename7samplesE[4] = {105, 110, 116, 0};
.global .align 4 .u32 _ZN21rti_internal_typeenum7pixelIDE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum10resolutionE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6normalE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum6camPosE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum4rootE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum12imageEnabledE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8tileInfoE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum8additiveE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum19lightMeshBufferSizeE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum14lightInvCutoffE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum14lightPointSizeE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum10lightColorE = 4919;
.global .align 4 .u32 _ZN21rti_internal_typeenum7samplesE = 4919;
.global .align 16 .b8 _ZN21rti_internal_semantic7pixelIDE[14] = {114, 116, 76, 97, 117, 110, 99, 104, 73, 110, 100, 101, 120, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic10resolutionE[12] = {114, 116, 76, 97, 117, 110, 99, 104, 68, 105, 109, 0};
.global .align 16 .b8 _ZN21rti_internal_semantic6normalE[17] = {97, 116, 116, 114, 105, 98, 117, 116, 101, 32, 110, 111, 114, 109, 97, 108, 0};
.global .align 1 .b8 _ZN21rti_internal_semantic6camPosE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic4rootE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic12imageEnabledE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8tileInfoE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic8additiveE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic19lightMeshBufferSizeE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic14lightInvCutoffE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic14lightPointSizeE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic10lightColorE[1];
.global .align 1 .b8 _ZN21rti_internal_semantic7samplesE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7pixelIDE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation10resolutionE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6normalE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation6camPosE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation4rootE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation12imageEnabledE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8tileInfoE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation8additiveE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation19lightMeshBufferSizeE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation14lightInvCutoffE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation14lightPointSizeE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation10lightColorE[1];
.global .align 1 .b8 _ZN23rti_internal_annotation7samplesE[1];
.const .align 4 .b8 __cudart_i2opi_f[24] = {65, 144, 67, 60, 153, 149, 98, 219, 192, 221, 52, 245, 209, 87, 39, 252, 41, 21, 68, 78, 110, 131, 249, 162};

.visible .entry _Z6oxMainv(

)
{
	.local .align 4 .b8 	__local_depot0[36];
	.reg .b64 	%SP;
	.reg .b64 	%SPL;
	.reg .pred 	%p<151>;
	.reg .b16 	%rs<152>;
	.reg .f32 	%f<1034>;
	.reg .b32 	%r<415>;
	.reg .b64 	%rd<308>;


	mov.u64 	%rd307, __local_depot0;
	cvta.local.u64 	%SP, %rd307;
	ld.global.u32 	%r1, [samples];
	ld.global.v2.u32 	{%r103, %r104}, [pixelID];
	cvt.u64.u32	%rd23, %r103;
	cvt.u64.u32	%rd24, %r104;
	mov.u64 	%rd27, uvnormal;
	cvta.global.u64 	%rd22, %rd27;
	mov.u32 	%r101, 2;
	mov.u32 	%r102, 4;
	mov.u64 	%rd26, 0;
	// inline asm
	call (%rd21), _rt_buffer_get_64, (%rd22, %r101, %r102, %rd23, %rd24, %rd26, %rd26);
	// inline asm
	ld.u32 	%r2, [%rd21];
	shr.u32 	%r107, %r2, 16;
	cvt.u16.u32	%rs1, %r107;
	and.b16  	%rs7, %rs1, 255;
	cvt.u16.u32	%rs8, %r2;
	or.b16  	%rs9, %rs8, %rs7;
	setp.eq.s16	%p7, %rs9, 0;
	mov.f32 	%f956, 0f00000000;
	mov.f32 	%f957, %f956;
	mov.f32 	%f958, %f956;
	@%p7 bra 	BB0_2;

	ld.u8 	%rs10, [%rd21+1];
	and.b16  	%rs12, %rs8, 255;
	cvt.rn.f32.u16	%f231, %rs12;
	div.rn.f32 	%f232, %f231, 0f437F0000;
	fma.rn.f32 	%f233, %f232, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f234, %rs10;
	div.rn.f32 	%f235, %f234, 0f437F0000;
	fma.rn.f32 	%f236, %f235, 0f40000000, 0fBF800000;
	cvt.rn.f32.u16	%f237, %rs7;
	div.rn.f32 	%f238, %f237, 0f437F0000;
	fma.rn.f32 	%f239, %f238, 0f40000000, 0fBF800000;
	mul.f32 	%f240, %f236, %f236;
	fma.rn.f32 	%f241, %f233, %f233, %f240;
	fma.rn.f32 	%f242, %f239, %f239, %f241;
	sqrt.rn.f32 	%f243, %f242;
	rcp.rn.f32 	%f244, %f243;
	mul.f32 	%f956, %f233, %f244;
	mul.f32 	%f957, %f236, %f244;
	mul.f32 	%f958, %f239, %f244;

BB0_2:
	ld.global.v2.u32 	{%r108, %r109}, [pixelID];
	ld.global.v2.u32 	{%r111, %r112}, [tileInfo];
	add.s32 	%r3, %r108, %r111;
	add.s32 	%r4, %r109, %r112;
	setp.eq.f32	%p8, %f957, 0f00000000;
	setp.eq.f32	%p9, %f956, 0f00000000;
	and.pred  	%p10, %p9, %p8;
	setp.eq.f32	%p11, %f958, 0f00000000;
	and.pred  	%p12, %p10, %p11;
	@%p12 bra 	BB0_141;
	bra.uni 	BB0_3;

BB0_141:
	ld.global.u32 	%r414, [imageEnabled];
	and.b32  	%r336, %r414, 1;
	setp.eq.b32	%p142, %r336, 1;
	@!%p142 bra 	BB0_143;
	bra.uni 	BB0_142;

BB0_142:
	cvt.u64.u32	%rd189, %r3;
	cvt.u64.u32	%rd190, %r4;
	mov.u64 	%rd193, image;
	cvta.global.u64 	%rd188, %rd193;
	mov.u64 	%rd192, 0;
	// inline asm
	call (%rd187), _rt_buffer_get_64, (%rd188, %r101, %r102, %rd189, %rd190, %rd192, %rd192);
	// inline asm
	mov.u16 	%rs84, 0;
	st.v4.u8 	[%rd187], {%rs84, %rs84, %rs84, %rs84};
	ld.global.u32 	%r414, [imageEnabled];

BB0_143:
	and.b32  	%r339, %r414, 8;
	setp.eq.s32	%p143, %r339, 0;
	@%p143 bra 	BB0_145;

	cvt.u64.u32	%rd197, %r4;
	cvt.u64.u32	%rd196, %r3;
	mov.u64 	%rd200, image_Mask;
	cvta.global.u64 	%rd195, %rd200;
	mov.u64 	%rd199, 0;
	// inline asm
	call (%rd194), _rt_buffer_get_64, (%rd195, %r101, %r101, %rd196, %rd197, %rd199, %rd199);
	// inline asm
	mov.f32 	%f911, 0f00000000;
	cvt.rzi.u32.f32	%r342, %f911;
	cvt.u16.u32	%rs85, %r342;
	mov.u16 	%rs86, 0;
	st.v2.u8 	[%rd194], {%rs85, %rs86};
	ld.global.u32 	%r414, [imageEnabled];

BB0_145:
	cvt.u64.u32	%rd19, %r3;
	cvt.u64.u32	%rd20, %r4;
	and.b32  	%r343, %r414, 4;
	setp.eq.s32	%p144, %r343, 0;
	@%p144 bra 	BB0_149;

	ld.global.u32 	%r344, [additive];
	setp.eq.s32	%p145, %r344, 0;
	@%p145 bra 	BB0_148;

	mov.u64 	%rd213, image_HDR;
	cvta.global.u64 	%rd202, %rd213;
	mov.u32 	%r348, 8;
	mov.u64 	%rd212, 0;
	// inline asm
	call (%rd201), _rt_buffer_get_64, (%rd202, %r101, %r348, %rd19, %rd20, %rd212, %rd212);
	// inline asm
	ld.v4.u16 	{%rs93, %rs94, %rs95, %rs96}, [%rd201];
	// inline asm
	{  cvt.f32.f16 %f912, %rs93;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f913, %rs94;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f914, %rs95;}

	// inline asm
	// inline asm
	call (%rd207), _rt_buffer_get_64, (%rd202, %r101, %r348, %rd19, %rd20, %rd212, %rd212);
	// inline asm
	add.f32 	%f915, %f912, 0f00000000;
	add.f32 	%f916, %f913, 0f00000000;
	add.f32 	%f917, %f914, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs92, %f917;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs91, %f916;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs90, %f915;}

	// inline asm
	mov.u16 	%rs97, 0;
	st.v4.u16 	[%rd207], {%rs90, %rs91, %rs92, %rs97};
	bra.uni 	BB0_149;

BB0_3:
	ld.global.v2.u32 	{%r121, %r122}, [pixelID];
	cvt.u64.u32	%rd30, %r121;
	cvt.u64.u32	%rd31, %r122;
	mov.u64 	%rd40, uvpos;
	cvta.global.u64 	%rd29, %rd40;
	mov.u32 	%r117, 12;
	// inline asm
	call (%rd28), _rt_buffer_get_64, (%rd29, %r101, %r117, %rd30, %rd31, %rd26, %rd26);
	// inline asm
	ld.f32 	%f9, [%rd28+8];
	ld.f32 	%f8, [%rd28+4];
	ld.f32 	%f7, [%rd28];
	mul.f32 	%f251, %f7, 0f3456BF95;
	mul.f32 	%f252, %f8, 0f3456BF95;
	mul.f32 	%f253, %f9, 0f3456BF95;
	abs.f32 	%f10, %f956;
	div.rn.f32 	%f254, %f251, %f10;
	abs.f32 	%f255, %f957;
	div.rn.f32 	%f256, %f252, %f255;
	abs.f32 	%f11, %f958;
	div.rn.f32 	%f257, %f253, %f11;
	abs.f32 	%f258, %f254;
	abs.f32 	%f259, %f256;
	abs.f32 	%f260, %f257;
	mov.f32 	%f261, 0f38D1B717;
	max.f32 	%f262, %f258, %f261;
	max.f32 	%f263, %f259, %f261;
	max.f32 	%f264, %f260, %f261;
	fma.rn.f32 	%f12, %f956, %f262, %f7;
	fma.rn.f32 	%f13, %f957, %f263, %f8;
	fma.rn.f32 	%f14, %f958, %f264, %f9;
	ld.global.v2.u32 	{%r125, %r126}, [pixelID];
	cvt.u64.u32	%rd36, %r125;
	cvt.u64.u32	%rd37, %r126;
	mov.u64 	%rd41, rnd_seeds;
	cvta.global.u64 	%rd35, %rd41;
	// inline asm
	call (%rd34), _rt_buffer_get_64, (%rd35, %r101, %r102, %rd36, %rd37, %rd26, %rd26);
	// inline asm
	ld.u32 	%r129, [%rd34];
	mad.lo.s32 	%r5, %r129, 1664525, 1013904223;
	ld.global.u32 	%r130, [lightMeshBufferSize];
	setp.eq.s32	%p14, %r130, 0;
	mov.pred 	%p13, 0;
	mov.f32 	%f20, 0f00000000;
	mov.u32 	%r7, 0;
	@%p14 bra 	BB0_4;

	ld.global.f32 	%f15, [lightPointSize];
	mul.f32 	%f16, %f12, 0f3456BF95;
	mul.f32 	%f17, %f13, 0f3456BF95;
	mul.f32 	%f18, %f14, 0f3456BF95;
	and.b32  	%r133, %r5, 16777215;
	cvt.rn.f32.u32	%f271, %r133;
	mul.f32 	%f272, %f271, 0fB3800000;
	fma.rn.f32 	%f19, %f272, 0f3F333333, 0f3F800000;
	mov.f32 	%f20, 0f00000000;
	mov.u32 	%r383, 0;
	abs.f32 	%f394, %f17;
	abs.f32 	%f395, %f16;
	max.f32 	%f396, %f395, %f394;
	abs.f32 	%f397, %f18;
	max.f32 	%f398, %f396, %f397;
	mov.u32 	%r7, %r383;
	mov.f32 	%f21, %f20;
	mov.f32 	%f22, %f20;
	mov.f32 	%f23, %f20;
	mov.f32 	%f24, %f20;
	mov.f32 	%f25, %f20;

BB0_6:
	shl.b32 	%r8, %r383, 1;
	cvt.s64.s32	%rd44, %r8;
	mov.u64 	%rd48, lightMeshBuffer;
	cvta.global.u64 	%rd43, %rd48;
	mov.u32 	%r134, 1;
	// inline asm
	call (%rd42), _rt_buffer_get_64, (%rd43, %r134, %r117, %rd44, %rd26, %rd26, %rd26);
	// inline asm
	ld.f32 	%f273, [%rd42];
	sub.f32 	%f274, %f273, %f7;
	ld.f32 	%f275, [%rd42+4];
	sub.f32 	%f276, %f275, %f8;
	ld.f32 	%f277, [%rd42+8];
	sub.f32 	%f278, %f277, %f9;
	mul.f32 	%f279, %f276, %f276;
	fma.rn.f32 	%f280, %f274, %f274, %f279;
	fma.rn.f32 	%f281, %f278, %f278, %f280;
	sqrt.rn.f32 	%f26, %f281;
	rcp.rn.f32 	%f282, %f26;
	mul.f32 	%f27, %f274, %f282;
	mul.f32 	%f28, %f276, %f282;
	mul.f32 	%f29, %f278, %f282;
	mul.f32 	%f283, %f957, %f28;
	fma.rn.f32 	%f284, %f956, %f27, %f283;
	fma.rn.f32 	%f30, %f958, %f29, %f284;
	setp.leu.f32	%p15, %f30, 0f00000000;
	@%p15 bra 	BB0_22;

	setp.ne.s32	%p17, %r1, 0;
	mul.f32 	%f285, %f26, %f26;
	mul.f32 	%f286, %f285, 0f40C90FDB;
	div.rn.f32 	%f287, %f15, %f286;
	add.f32 	%f31, %f287, %f287;
	setp.gt.f32	%p18, %f31, %f19;
	and.pred  	%p19, %p17, %p18;
	mov.pred 	%p150, -1;
	@%p19 bra 	BB0_24;

	ld.global.f32 	%f290, [lightInvCutoff];
	mul.f32 	%f32, %f26, %f290;
	mov.f32 	%f294, 0f40800000;
	abs.f32 	%f34, %f32;
	setp.lt.f32	%p20, %f34, 0f00800000;
	mul.f32 	%f296, %f34, 0f4B800000;
	selp.f32	%f297, 0fC3170000, 0fC2FE0000, %p20;
	selp.f32	%f298, %f296, %f34, %p20;
	mov.b32 	 %r136, %f298;
	and.b32  	%r137, %r136, 8388607;
	or.b32  	%r138, %r137, 1065353216;
	mov.b32 	 %f299, %r138;
	shr.u32 	%r139, %r136, 23;
	cvt.rn.f32.u32	%f300, %r139;
	add.f32 	%f301, %f297, %f300;
	setp.gt.f32	%p21, %f299, 0f3FB504F3;
	mul.f32 	%f302, %f299, 0f3F000000;
	add.f32 	%f303, %f301, 0f3F800000;
	selp.f32	%f304, %f302, %f299, %p21;
	selp.f32	%f305, %f303, %f301, %p21;
	add.f32 	%f306, %f304, 0fBF800000;
	add.f32 	%f289, %f304, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f288,%f289;
	// inline asm
	add.f32 	%f307, %f306, %f306;
	mul.f32 	%f308, %f288, %f307;
	mul.f32 	%f309, %f308, %f308;
	mov.f32 	%f310, 0f3C4CAF63;
	mov.f32 	%f311, 0f3B18F0FE;
	fma.rn.f32 	%f312, %f311, %f309, %f310;
	mov.f32 	%f313, 0f3DAAAABD;
	fma.rn.f32 	%f314, %f312, %f309, %f313;
	mul.rn.f32 	%f315, %f314, %f309;
	mul.rn.f32 	%f316, %f315, %f308;
	sub.f32 	%f317, %f306, %f308;
	neg.f32 	%f318, %f308;
	add.f32 	%f319, %f317, %f317;
	fma.rn.f32 	%f320, %f318, %f306, %f319;
	mul.rn.f32 	%f321, %f288, %f320;
	add.f32 	%f322, %f316, %f308;
	sub.f32 	%f323, %f308, %f322;
	add.f32 	%f324, %f316, %f323;
	add.f32 	%f325, %f321, %f324;
	add.f32 	%f326, %f322, %f325;
	sub.f32 	%f327, %f322, %f326;
	add.f32 	%f328, %f325, %f327;
	mov.f32 	%f329, 0f3F317200;
	mul.rn.f32 	%f330, %f305, %f329;
	mov.f32 	%f331, 0f35BFBE8E;
	mul.rn.f32 	%f332, %f305, %f331;
	add.f32 	%f333, %f330, %f326;
	sub.f32 	%f334, %f330, %f333;
	add.f32 	%f335, %f326, %f334;
	add.f32 	%f336, %f328, %f335;
	add.f32 	%f337, %f332, %f336;
	add.f32 	%f338, %f333, %f337;
	sub.f32 	%f339, %f333, %f338;
	add.f32 	%f340, %f337, %f339;
	mul.rn.f32 	%f341, %f294, %f338;
	neg.f32 	%f342, %f341;
	fma.rn.f32 	%f343, %f294, %f338, %f342;
	fma.rn.f32 	%f344, %f294, %f340, %f343;
	mov.f32 	%f345, 0f00000000;
	fma.rn.f32 	%f346, %f345, %f338, %f344;
	add.rn.f32 	%f347, %f341, %f346;
	neg.f32 	%f348, %f347;
	add.rn.f32 	%f349, %f341, %f348;
	add.rn.f32 	%f350, %f349, %f346;
	mov.b32 	 %r140, %f347;
	setp.eq.s32	%p22, %r140, 1118925336;
	add.s32 	%r141, %r140, -1;
	mov.b32 	 %f351, %r141;
	add.f32 	%f352, %f350, 0f37000000;
	selp.f32	%f353, %f351, %f347, %p22;
	selp.f32	%f35, %f352, %f350, %p22;
	mul.f32 	%f354, %f353, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f355, %f354;
	mov.f32 	%f356, 0fBF317200;
	fma.rn.f32 	%f357, %f355, %f356, %f353;
	mov.f32 	%f358, 0fB5BFBE8E;
	fma.rn.f32 	%f359, %f355, %f358, %f357;
	mul.f32 	%f360, %f359, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f361, %f360;
	add.f32 	%f362, %f355, 0f00000000;
	ex2.approx.f32 	%f363, %f362;
	mul.f32 	%f364, %f361, %f363;
	setp.lt.f32	%p23, %f353, 0fC2D20000;
	selp.f32	%f365, 0f00000000, %f364, %p23;
	setp.gt.f32	%p24, %f353, 0f42D20000;
	selp.f32	%f965, 0f7F800000, %f365, %p24;
	setp.eq.f32	%p25, %f965, 0f7F800000;
	@%p25 bra 	BB0_10;

	fma.rn.f32 	%f965, %f965, %f35, %f965;

BB0_10:
	mov.f32 	%f952, 0f40000000;
	cvt.rzi.f32.f32	%f951, %f952;
	add.f32 	%f950, %f951, %f951;
	mov.f32 	%f949, 0f40800000;
	sub.f32 	%f948, %f949, %f950;
	abs.f32 	%f947, %f948;
	setp.lt.f32	%p26, %f32, 0f00000000;
	setp.eq.f32	%p27, %f947, 0f3F800000;
	and.pred  	%p1, %p26, %p27;
	mov.b32 	 %r142, %f965;
	xor.b32  	%r143, %r142, -2147483648;
	mov.b32 	 %f366, %r143;
	selp.f32	%f967, %f366, %f965, %p1;
	setp.eq.f32	%p28, %f32, 0f00000000;
	@%p28 bra 	BB0_13;
	bra.uni 	BB0_11;

BB0_13:
	add.f32 	%f369, %f32, %f32;
	selp.f32	%f967, %f369, 0f00000000, %p27;
	bra.uni 	BB0_14;

BB0_11:
	setp.geu.f32	%p29, %f32, 0f00000000;
	@%p29 bra 	BB0_14;

	mov.f32 	%f955, 0f40800000;
	cvt.rzi.f32.f32	%f368, %f955;
	setp.neu.f32	%p30, %f368, 0f40800000;
	selp.f32	%f967, 0f7FFFFFFF, %f967, %p30;

BB0_14:
	add.f32 	%f370, %f34, 0f40800000;
	mov.b32 	 %r144, %f370;
	setp.lt.s32	%p32, %r144, 2139095040;
	@%p32 bra 	BB0_19;

	setp.gtu.f32	%p33, %f34, 0f7F800000;
	@%p33 bra 	BB0_18;
	bra.uni 	BB0_16;

BB0_18:
	add.f32 	%f967, %f32, 0f40800000;
	bra.uni 	BB0_19;

BB0_16:
	setp.neu.f32	%p34, %f34, 0f7F800000;
	@%p34 bra 	BB0_19;

	selp.f32	%f967, 0fFF800000, 0f7F800000, %p1;

BB0_19:
	mov.u32 	%r380, 1;
	mov.u64 	%rd302, lightMeshBuffer;
	cvta.global.u64 	%rd301, %rd302;
	shl.b32 	%r379, %r383, 1;
	mov.f32 	%f371, 0f3F800000;
	sub.f32 	%f372, %f371, %f967;
	setp.eq.f32	%p35, %f32, 0f3F800000;
	selp.f32	%f373, 0f00000000, %f372, %p35;
	cvt.sat.f32.f32	%f374, %f373;
	mul.f32 	%f375, %f31, %f374;
	add.s32 	%r147, %r379, 1;
	cvt.s64.s32	%rd51, %r147;
	// inline asm
	call (%rd49), _rt_buffer_get_64, (%rd301, %r380, %r117, %rd51, %rd26, %rd26, %rd26);
	// inline asm
	ld.f32 	%f376, [%rd49];
	mul.f32 	%f377, %f27, %f376;
	ld.f32 	%f378, [%rd49+4];
	mul.f32 	%f379, %f28, %f378;
	neg.f32 	%f380, %f379;
	sub.f32 	%f381, %f380, %f377;
	ld.f32 	%f382, [%rd49+8];
	mul.f32 	%f383, %f29, %f382;
	sub.f32 	%f384, %f381, %f383;
	cvt.sat.f32.f32	%f385, %f384;
	mul.f32 	%f46, %f375, %f385;
	setp.leu.f32	%p36, %f46, 0f3727C5AC;
	@%p36 bra 	BB0_21;

	mov.u32 	%r382, 1;
	add.u64 	%rd56, %SP, 4;
	cvta.to.local.u64 	%rd57, %rd56;
	max.f32 	%f392, %f398, %f261;
	sub.f32 	%f393, %f26, %f392;
	mov.u32 	%r151, 1065353216;
	st.local.u32 	[%rd57], %r151;
	ld.global.u32 	%r148, [root];
	// inline asm
	call _rt_trace_64, (%r148, %f12, %f13, %f14, %f27, %f28, %f29, %r382, %f392, %f393, %rd56, %r102);
	// inline asm
	ld.local.f32 	%f400, [%rd57];
	mul.f32 	%f401, %f46, %f400;
	cvt.sat.f32.f32	%f402, %f30;
	fma.rn.f32 	%f25, %f402, %f401, %f25;
	mul.f32 	%f403, %f30, 0f40800000;
	cvt.sat.f32.f32	%f404, %f403;
	mul.f32 	%f405, %f401, %f404;
	fma.rn.f32 	%f23, %f27, %f405, %f23;
	fma.rn.f32 	%f22, %f28, %f405, %f22;
	fma.rn.f32 	%f21, %f29, %f405, %f21;
	add.f32 	%f24, %f24, %f405;
	add.f32 	%f20, %f20, %f400;

BB0_21:
	add.s32 	%r7, %r7, 1;

BB0_22:
	ld.global.u32 	%r152, [lightMeshBufferSize];
	add.s32 	%r383, %r383, 1;
	setp.lt.u32	%p38, %r383, %r152;
	@%p38 bra 	BB0_6;
	bra.uni 	BB0_23;

BB0_4:
	mov.f32 	%f21, %f20;
	mov.f32 	%f22, %f20;
	mov.f32 	%f23, %f20;
	mov.f32 	%f24, %f20;
	mov.f32 	%f25, %f20;

BB0_23:
	mov.pred 	%p150, %p13;

BB0_24:
	cvt.rn.f32.s32	%f406, %r7;
	mov.f32 	%f407, 0f3F800000;
	max.f32 	%f408, %f406, %f407;
	div.rn.f32 	%f1016, %f25, %f408;
	div.rn.f32 	%f1021, %f20, %f408;
	div.rn.f32 	%f1017, %f24, %f408;
	div.rn.f32 	%f1018, %f23, %f408;
	div.rn.f32 	%f1019, %f22, %f408;
	div.rn.f32 	%f1020, %f21, %f408;
	@!%p150 bra 	BB0_77;
	bra.uni 	BB0_25;

BB0_25:
	abs.f32 	%f954, %f958;
	abs.f32 	%f953, %f956;
	setp.gt.f32	%p39, %f953, %f954;
	neg.f32 	%f415, %f957;
	selp.f32	%f416, %f415, 0f00000000, %p39;
	neg.f32 	%f417, %f958;
	selp.f32	%f418, %f956, %f417, %p39;
	selp.f32	%f419, 0f00000000, %f957, %p39;
	mul.f32 	%f420, %f418, %f418;
	fma.rn.f32 	%f421, %f416, %f416, %f420;
	fma.rn.f32 	%f422, %f419, %f419, %f421;
	sqrt.rn.f32 	%f423, %f422;
	rcp.rn.f32 	%f424, %f423;
	mul.f32 	%f77, %f416, %f424;
	mul.f32 	%f78, %f418, %f424;
	mul.f32 	%f79, %f419, %f424;
	mov.f32 	%f992, 0f00000000;
	setp.lt.s32	%p40, %r1, 1;
	mov.f32 	%f993, %f992;
	mov.f32 	%f994, %f992;
	mov.f32 	%f995, %f992;
	mov.f32 	%f996, %f992;
	mov.f32 	%f997, %f992;
	@%p40 bra 	BB0_76;

	mad.lo.s32 	%r390, %r129, 1664525, 1013904223;
	cvt.rn.f32.s32	%f431, %r1;
	rcp.rn.f32 	%f80, %f431;
	add.u64 	%rd58, %SP, 8;
	cvta.to.local.u64 	%rd2, %rd58;
	mul.f32 	%f81, %f12, 0f3456BF95;
	mul.f32 	%f82, %f13, 0f3456BF95;
	mul.f32 	%f83, %f14, 0f3456BF95;
	add.u64 	%rd59, %SP, 0;
	cvta.to.local.u64 	%rd3, %rd59;
	mul.f32 	%f432, %f956, %f78;
	mul.f32 	%f433, %f957, %f77;
	sub.f32 	%f84, %f433, %f432;
	mul.f32 	%f434, %f958, %f77;
	mul.f32 	%f435, %f956, %f79;
	sub.f32 	%f85, %f435, %f434;
	mul.f32 	%f436, %f957, %f79;
	mul.f32 	%f437, %f958, %f78;
	sub.f32 	%f86, %f437, %f436;
	mov.f32 	%f992, 0f00000000;
	mov.u32 	%r153, 0;
	abs.f32 	%f438, %f82;
	abs.f32 	%f439, %f81;
	max.f32 	%f440, %f439, %f438;
	abs.f32 	%f441, %f83;
	max.f32 	%f442, %f440, %f441;
	mov.u32 	%r387, %r153;
	mov.f32 	%f993, %f992;
	mov.f32 	%f994, %f992;
	mov.f32 	%f995, %f992;
	mov.f32 	%f996, %f992;
	mov.f32 	%f997, %f992;

BB0_27:
	cvt.rn.f32.s32	%f93, %r387;
	max.f32 	%f94, %f442, %f261;
	mov.u32 	%r389, %r153;

BB0_28:
	mad.lo.s32 	%r155, %r390, 1664525, 1013904223;
	and.b32  	%r156, %r155, 16777215;
	cvt.rn.f32.u32	%f444, %r156;
	fma.rn.f32 	%f445, %f444, 0f33800000, %f93;
	mul.f32 	%f101, %f80, %f445;
	mad.lo.s32 	%r390, %r155, 1664525, 1013904223;
	and.b32  	%r157, %r390, 16777215;
	cvt.rn.f32.u32	%f446, %r157;
	cvt.rn.f32.s32	%f447, %r389;
	fma.rn.f32 	%f448, %f446, 0f33800000, %f447;
	mul.f32 	%f449, %f80, %f448;
	mul.f32 	%f450, %f101, %f101;
	sub.f32 	%f452, %f407, %f450;
	mov.f32 	%f453, 0f00000000;
	max.f32 	%f454, %f453, %f452;
	sqrt.rn.f32 	%f102, %f454;
	mul.f32 	%f1004, %f449, 0f40C90FDB;
	abs.f32 	%f104, %f1004;
	setp.neu.f32	%p41, %f104, 0f7F800000;
	mov.f32 	%f998, %f1004;
	@%p41 bra 	BB0_30;

	mul.rn.f32 	%f998, %f1004, %f453;

BB0_30:
	mul.f32 	%f456, %f998, 0f3F22F983;
	cvt.rni.s32.f32	%r400, %f456;
	cvt.rn.f32.s32	%f457, %r400;
	neg.f32 	%f458, %f457;
	mov.f32 	%f459, 0f3FC90FDA;
	fma.rn.f32 	%f460, %f458, %f459, %f998;
	mov.f32 	%f461, 0f33A22168;
	fma.rn.f32 	%f462, %f458, %f461, %f460;
	mov.f32 	%f463, 0f27C234C5;
	fma.rn.f32 	%f999, %f458, %f463, %f462;
	abs.f32 	%f464, %f998;
	setp.leu.f32	%p42, %f464, 0f47CE4780;
	@%p42 bra 	BB0_41;

	mov.b32 	 %r19, %f998;
	shr.u32 	%r20, %r19, 23;
	shl.b32 	%r160, %r19, 8;
	or.b32  	%r21, %r160, -2147483648;
	mov.u32 	%r391, 0;
	mov.u64 	%rd304, 0;
	mov.u64 	%rd303, %rd2;
	mov.u32 	%r392, %r391;

BB0_32:
	.pragma "nounroll";
	shl.b64 	%rd61, %rd304, 2;
	mov.u64 	%rd62, __cudart_i2opi_f;
	add.s64 	%rd63, %rd62, %rd61;
	ld.const.u32 	%r163, [%rd63];
	// inline asm
	{
	mad.lo.cc.u32   %r161, %r163, %r21, %r392;
	madc.hi.u32     %r392, %r163, %r21,  0;
	}
	// inline asm
	st.local.u32 	[%rd303], %r161;
	add.s32 	%r391, %r391, 1;
	cvt.s64.s32	%rd304, %r391;
	mul.wide.s32 	%rd64, %r391, 4;
	add.s64 	%rd303, %rd2, %rd64;
	setp.ne.s32	%p43, %r391, 6;
	@%p43 bra 	BB0_32;

	and.b32  	%r166, %r20, 255;
	add.s32 	%r167, %r166, -128;
	shr.u32 	%r168, %r167, 5;
	and.b32  	%r26, %r19, -2147483648;
	st.local.u32 	[%rd2+24], %r392;
	mov.u32 	%r169, 6;
	sub.s32 	%r170, %r169, %r168;
	mul.wide.s32 	%rd65, %r170, 4;
	add.s64 	%rd9, %rd2, %rd65;
	ld.local.u32 	%r393, [%rd9];
	ld.local.u32 	%r394, [%rd9+-4];
	and.b32  	%r29, %r20, 31;
	setp.eq.s32	%p44, %r29, 0;
	@%p44 bra 	BB0_35;

	mov.u32 	%r171, 32;
	sub.s32 	%r172, %r171, %r29;
	shr.u32 	%r173, %r394, %r172;
	shl.b32 	%r174, %r393, %r29;
	add.s32 	%r393, %r173, %r174;
	ld.local.u32 	%r175, [%rd9+-8];
	shr.u32 	%r176, %r175, %r172;
	shl.b32 	%r177, %r394, %r29;
	add.s32 	%r394, %r176, %r177;

BB0_35:
	shr.u32 	%r178, %r394, 30;
	shl.b32 	%r179, %r393, 2;
	add.s32 	%r395, %r178, %r179;
	shl.b32 	%r35, %r394, 2;
	shr.u32 	%r180, %r395, 31;
	shr.u32 	%r181, %r393, 30;
	add.s32 	%r36, %r180, %r181;
	setp.eq.s32	%p45, %r180, 0;
	@%p45 bra 	BB0_36;
	bra.uni 	BB0_37;

BB0_36:
	mov.u32 	%r396, %r26;
	mov.u32 	%r397, %r35;
	bra.uni 	BB0_38;

BB0_37:
	not.b32 	%r182, %r395;
	neg.s32 	%r397, %r35;
	setp.eq.s32	%p46, %r35, 0;
	selp.u32	%r183, 1, 0, %p46;
	add.s32 	%r395, %r183, %r182;
	xor.b32  	%r396, %r26, -2147483648;

BB0_38:
	clz.b32 	%r399, %r395;
	setp.eq.s32	%p47, %r399, 0;
	shl.b32 	%r184, %r395, %r399;
	mov.u32 	%r185, 32;
	sub.s32 	%r186, %r185, %r399;
	shr.u32 	%r187, %r397, %r186;
	add.s32 	%r188, %r187, %r184;
	selp.b32	%r44, %r395, %r188, %p47;
	mov.u32 	%r189, -921707870;
	mul.hi.u32 	%r398, %r44, %r189;
	setp.eq.s32	%p48, %r26, 0;
	neg.s32 	%r190, %r36;
	selp.b32	%r400, %r36, %r190, %p48;
	setp.lt.s32	%p49, %r398, 1;
	@%p49 bra 	BB0_40;

	mul.lo.s32 	%r191, %r44, -921707870;
	shr.u32 	%r192, %r191, 31;
	shl.b32 	%r193, %r398, 1;
	add.s32 	%r398, %r192, %r193;
	add.s32 	%r399, %r399, 1;

BB0_40:
	mov.u32 	%r194, 126;
	sub.s32 	%r195, %r194, %r399;
	shl.b32 	%r196, %r195, 23;
	add.s32 	%r197, %r398, 1;
	shr.u32 	%r198, %r197, 7;
	add.s32 	%r199, %r198, 1;
	shr.u32 	%r200, %r199, 1;
	add.s32 	%r201, %r200, %r196;
	or.b32  	%r202, %r201, %r396;
	mov.b32 	 %f999, %r202;

BB0_41:
	mul.rn.f32 	%f110, %f999, %f999;
	add.s32 	%r52, %r400, 1;
	and.b32  	%r53, %r52, 1;
	setp.eq.s32	%p50, %r53, 0;
	@%p50 bra 	BB0_43;
	bra.uni 	BB0_42;

BB0_43:
	mov.f32 	%f467, 0f3C08839E;
	mov.f32 	%f468, 0fB94CA1F9;
	fma.rn.f32 	%f1000, %f468, %f110, %f467;
	bra.uni 	BB0_44;

BB0_42:
	mov.f32 	%f465, 0fBAB6061A;
	mov.f32 	%f466, 0f37CCF5CE;
	fma.rn.f32 	%f1000, %f466, %f110, %f465;

BB0_44:
	@%p50 bra 	BB0_46;
	bra.uni 	BB0_45;

BB0_46:
	mov.f32 	%f472, 0fBE2AAAA3;
	fma.rn.f32 	%f473, %f1000, %f110, %f472;
	fma.rn.f32 	%f1001, %f473, %f110, %f453;
	bra.uni 	BB0_47;

BB0_45:
	mov.f32 	%f469, 0f3D2AAAA5;
	fma.rn.f32 	%f470, %f1000, %f110, %f469;
	mov.f32 	%f471, 0fBF000000;
	fma.rn.f32 	%f1001, %f470, %f110, %f471;

BB0_47:
	fma.rn.f32 	%f1002, %f1001, %f999, %f999;
	@%p50 bra 	BB0_49;

	fma.rn.f32 	%f1002, %f1001, %f110, %f407;

BB0_49:
	and.b32  	%r203, %r52, 2;
	setp.eq.s32	%p53, %r203, 0;
	@%p53 bra 	BB0_51;

	mov.f32 	%f477, 0fBF800000;
	fma.rn.f32 	%f1002, %f1002, %f477, %f453;

BB0_51:
	@%p41 bra 	BB0_53;

	mul.rn.f32 	%f1004, %f1004, %f453;

BB0_53:
	mul.f32 	%f479, %f1004, 0f3F22F983;
	cvt.rni.s32.f32	%r410, %f479;
	cvt.rn.f32.s32	%f480, %r410;
	neg.f32 	%f481, %f480;
	fma.rn.f32 	%f483, %f481, %f459, %f1004;
	fma.rn.f32 	%f485, %f481, %f461, %f483;
	fma.rn.f32 	%f1005, %f481, %f463, %f485;
	abs.f32 	%f487, %f1004;
	setp.leu.f32	%p55, %f487, 0f47CE4780;
	@%p55 bra 	BB0_64;

	mov.b32 	 %r55, %f1004;
	shr.u32 	%r56, %r55, 23;
	shl.b32 	%r206, %r55, 8;
	or.b32  	%r57, %r206, -2147483648;
	mov.u32 	%r401, 0;
	mov.u64 	%rd305, %rd2;
	mov.u64 	%rd306, %rd26;
	mov.u32 	%r402, %r401;

BB0_55:
	.pragma "nounroll";
	shl.b64 	%rd67, %rd306, 2;
	mov.u64 	%rd68, __cudart_i2opi_f;
	add.s64 	%rd69, %rd68, %rd67;
	ld.const.u32 	%r209, [%rd69];
	// inline asm
	{
	mad.lo.cc.u32   %r207, %r209, %r57, %r402;
	madc.hi.u32     %r402, %r209, %r57,  0;
	}
	// inline asm
	st.local.u32 	[%rd305], %r207;
	add.s32 	%r401, %r401, 1;
	cvt.s64.s32	%rd306, %r401;
	mul.wide.s32 	%rd70, %r401, 4;
	add.s64 	%rd305, %rd2, %rd70;
	setp.ne.s32	%p56, %r401, 6;
	@%p56 bra 	BB0_55;

	and.b32  	%r212, %r56, 255;
	add.s32 	%r213, %r212, -128;
	shr.u32 	%r214, %r213, 5;
	and.b32  	%r62, %r55, -2147483648;
	st.local.u32 	[%rd2+24], %r402;
	mov.u32 	%r215, 6;
	sub.s32 	%r216, %r215, %r214;
	mul.wide.s32 	%rd71, %r216, 4;
	add.s64 	%rd15, %rd2, %rd71;
	ld.local.u32 	%r403, [%rd15];
	ld.local.u32 	%r404, [%rd15+-4];
	and.b32  	%r65, %r56, 31;
	setp.eq.s32	%p57, %r65, 0;
	@%p57 bra 	BB0_58;

	mov.u32 	%r217, 32;
	sub.s32 	%r218, %r217, %r65;
	shr.u32 	%r219, %r404, %r218;
	shl.b32 	%r220, %r403, %r65;
	add.s32 	%r403, %r219, %r220;
	ld.local.u32 	%r221, [%rd15+-8];
	shr.u32 	%r222, %r221, %r218;
	shl.b32 	%r223, %r404, %r65;
	add.s32 	%r404, %r222, %r223;

BB0_58:
	shr.u32 	%r224, %r404, 30;
	shl.b32 	%r225, %r403, 2;
	add.s32 	%r405, %r224, %r225;
	shl.b32 	%r71, %r404, 2;
	shr.u32 	%r226, %r405, 31;
	shr.u32 	%r227, %r403, 30;
	add.s32 	%r72, %r226, %r227;
	setp.eq.s32	%p58, %r226, 0;
	@%p58 bra 	BB0_59;
	bra.uni 	BB0_60;

BB0_59:
	mov.u32 	%r406, %r62;
	mov.u32 	%r407, %r71;
	bra.uni 	BB0_61;

BB0_60:
	not.b32 	%r228, %r405;
	neg.s32 	%r407, %r71;
	setp.eq.s32	%p59, %r71, 0;
	selp.u32	%r229, 1, 0, %p59;
	add.s32 	%r405, %r229, %r228;
	xor.b32  	%r406, %r62, -2147483648;

BB0_61:
	clz.b32 	%r409, %r405;
	setp.eq.s32	%p60, %r409, 0;
	shl.b32 	%r230, %r405, %r409;
	mov.u32 	%r231, 32;
	sub.s32 	%r232, %r231, %r409;
	shr.u32 	%r233, %r407, %r232;
	add.s32 	%r234, %r233, %r230;
	selp.b32	%r80, %r405, %r234, %p60;
	mov.u32 	%r235, -921707870;
	mul.hi.u32 	%r408, %r80, %r235;
	setp.eq.s32	%p61, %r62, 0;
	neg.s32 	%r236, %r72;
	selp.b32	%r410, %r72, %r236, %p61;
	setp.lt.s32	%p62, %r408, 1;
	@%p62 bra 	BB0_63;

	mul.lo.s32 	%r237, %r80, -921707870;
	shr.u32 	%r238, %r237, 31;
	shl.b32 	%r239, %r408, 1;
	add.s32 	%r408, %r238, %r239;
	add.s32 	%r409, %r409, 1;

BB0_63:
	mov.u32 	%r240, 126;
	sub.s32 	%r241, %r240, %r409;
	shl.b32 	%r242, %r241, 23;
	add.s32 	%r243, %r408, 1;
	shr.u32 	%r244, %r243, 7;
	add.s32 	%r245, %r244, 1;
	shr.u32 	%r246, %r245, 1;
	add.s32 	%r247, %r246, %r242;
	or.b32  	%r248, %r247, %r406;
	mov.b32 	 %f1005, %r248;

BB0_64:
	mul.rn.f32 	%f127, %f1005, %f1005;
	and.b32  	%r88, %r410, 1;
	setp.eq.s32	%p63, %r88, 0;
	@%p63 bra 	BB0_66;
	bra.uni 	BB0_65;

BB0_66:
	mov.f32 	%f490, 0f3C08839E;
	mov.f32 	%f491, 0fB94CA1F9;
	fma.rn.f32 	%f1006, %f491, %f127, %f490;
	bra.uni 	BB0_67;

BB0_65:
	mov.f32 	%f488, 0fBAB6061A;
	mov.f32 	%f489, 0f37CCF5CE;
	fma.rn.f32 	%f1006, %f489, %f127, %f488;

BB0_67:
	@%p63 bra 	BB0_69;
	bra.uni 	BB0_68;

BB0_69:
	mov.f32 	%f495, 0fBE2AAAA3;
	fma.rn.f32 	%f496, %f1006, %f127, %f495;
	fma.rn.f32 	%f1007, %f496, %f127, %f453;
	bra.uni 	BB0_70;

BB0_68:
	mov.f32 	%f492, 0f3D2AAAA5;
	fma.rn.f32 	%f493, %f1006, %f127, %f492;
	mov.f32 	%f494, 0fBF000000;
	fma.rn.f32 	%f1007, %f493, %f127, %f494;

BB0_70:
	fma.rn.f32 	%f1008, %f1007, %f1005, %f1005;
	@%p63 bra 	BB0_72;

	fma.rn.f32 	%f1008, %f1007, %f127, %f407;

BB0_72:
	and.b32  	%r249, %r410, 2;
	setp.eq.s32	%p66, %r249, 0;
	@%p66 bra 	BB0_74;

	mov.f32 	%f500, 0fBF800000;
	fma.rn.f32 	%f1008, %f1008, %f500, %f453;

BB0_74:
	mul.f32 	%f509, %f102, %f1002;
	mul.f32 	%f510, %f102, %f1008;
	mul.f32 	%f511, %f77, %f510;
	mul.f32 	%f512, %f78, %f510;
	mul.f32 	%f513, %f79, %f510;
	fma.rn.f32 	%f514, %f86, %f509, %f511;
	fma.rn.f32 	%f515, %f85, %f509, %f512;
	fma.rn.f32 	%f516, %f84, %f509, %f513;
	fma.rn.f32 	%f504, %f956, %f101, %f514;
	fma.rn.f32 	%f505, %f957, %f101, %f515;
	fma.rn.f32 	%f506, %f958, %f101, %f516;
	mov.u32 	%r251, 0;
	st.local.u32 	[%rd3], %r251;
	ld.global.u32 	%r250, [root];
	mov.f32 	%f508, 0f6C4ECB8F;
	// inline asm
	call _rt_trace_64, (%r250, %f12, %f13, %f14, %f504, %f505, %f506, %r251, %f94, %f508, %rd59, %r102);
	// inline asm
	ld.local.f32 	%f517, [%rd3];
	setp.lt.f32	%p67, %f517, 0f00000000;
	selp.f32	%f518, 0f00000000, %f517, %p67;
	selp.f32	%f519, 0f00000000, 0f3F800000, %p67;
	add.f32 	%f992, %f992, %f519;
	fma.rn.f32 	%f995, %f504, %f518, %f995;
	fma.rn.f32 	%f994, %f505, %f518, %f994;
	fma.rn.f32 	%f993, %f506, %f518, %f993;
	add.f32 	%f996, %f996, %f518;
	mul.f32 	%f520, %f957, %f505;
	fma.rn.f32 	%f521, %f956, %f504, %f520;
	fma.rn.f32 	%f522, %f958, %f506, %f521;
	cvt.sat.f32.f32	%f523, %f522;
	fma.rn.f32 	%f997, %f518, %f523, %f997;
	add.s32 	%r389, %r389, 1;
	setp.lt.s32	%p68, %r389, %r1;
	@%p68 bra 	BB0_28;

	add.s32 	%r387, %r387, 1;
	setp.lt.s32	%p69, %r387, %r1;
	@%p69 bra 	BB0_27;

BB0_76:
	mul.lo.s32 	%r253, %r1, %r1;
	cvt.rn.f32.s32	%f524, %r253;
	div.rn.f32 	%f525, %f997, %f524;
	div.rn.f32 	%f1021, %f992, %f524;
	div.rn.f32 	%f1017, %f996, %f524;
	div.rn.f32 	%f1018, %f995, %f524;
	div.rn.f32 	%f1019, %f994, %f524;
	div.rn.f32 	%f1020, %f993, %f524;
	add.f32 	%f1016, %f525, %f525;

BB0_77:
	ld.global.u32 	%r412, [imageEnabled];
	and.b32  	%r254, %r412, 8;
	setp.eq.s32	%p70, %r254, 0;
	@%p70 bra 	BB0_90;

	cvt.u64.u32	%rd75, %r3;
	cvt.u64.u32	%rd76, %r4;
	mov.u64 	%rd79, image_Mask;
	cvta.global.u64 	%rd74, %rd79;
	// inline asm
	call (%rd73), _rt_buffer_get_64, (%rd74, %r101, %r101, %rd75, %rd76, %rd26, %rd26);
	// inline asm
	mov.f32 	%f528, 0f3E68BA2E;
	cvt.rzi.f32.f32	%f529, %f528;
	fma.rn.f32 	%f530, %f529, 0fC0000000, 0f3EE8BA2E;
	abs.f32 	%f163, %f530;
	abs.f32 	%f164, %f1021;
	setp.lt.f32	%p71, %f164, 0f00800000;
	mul.f32 	%f531, %f164, 0f4B800000;
	selp.f32	%f532, 0fC3170000, 0fC2FE0000, %p71;
	selp.f32	%f533, %f531, %f164, %p71;
	mov.b32 	 %r257, %f533;
	and.b32  	%r258, %r257, 8388607;
	or.b32  	%r259, %r258, 1065353216;
	mov.b32 	 %f534, %r259;
	shr.u32 	%r260, %r257, 23;
	cvt.rn.f32.u32	%f535, %r260;
	add.f32 	%f536, %f532, %f535;
	setp.gt.f32	%p72, %f534, 0f3FB504F3;
	mul.f32 	%f537, %f534, 0f3F000000;
	add.f32 	%f538, %f536, 0f3F800000;
	selp.f32	%f539, %f537, %f534, %p72;
	selp.f32	%f540, %f538, %f536, %p72;
	add.f32 	%f541, %f539, 0fBF800000;
	add.f32 	%f527, %f539, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f526,%f527;
	// inline asm
	add.f32 	%f542, %f541, %f541;
	mul.f32 	%f543, %f526, %f542;
	mul.f32 	%f544, %f543, %f543;
	mov.f32 	%f545, 0f3C4CAF63;
	mov.f32 	%f546, 0f3B18F0FE;
	fma.rn.f32 	%f547, %f546, %f544, %f545;
	mov.f32 	%f548, 0f3DAAAABD;
	fma.rn.f32 	%f549, %f547, %f544, %f548;
	mul.rn.f32 	%f550, %f549, %f544;
	mul.rn.f32 	%f551, %f550, %f543;
	sub.f32 	%f552, %f541, %f543;
	neg.f32 	%f553, %f543;
	add.f32 	%f554, %f552, %f552;
	fma.rn.f32 	%f555, %f553, %f541, %f554;
	mul.rn.f32 	%f556, %f526, %f555;
	add.f32 	%f557, %f551, %f543;
	sub.f32 	%f558, %f543, %f557;
	add.f32 	%f559, %f551, %f558;
	add.f32 	%f560, %f556, %f559;
	add.f32 	%f561, %f557, %f560;
	sub.f32 	%f562, %f557, %f561;
	add.f32 	%f563, %f560, %f562;
	mov.f32 	%f564, 0f3F317200;
	mul.rn.f32 	%f565, %f540, %f564;
	mov.f32 	%f566, 0f35BFBE8E;
	mul.rn.f32 	%f567, %f540, %f566;
	add.f32 	%f568, %f565, %f561;
	sub.f32 	%f569, %f565, %f568;
	add.f32 	%f570, %f561, %f569;
	add.f32 	%f571, %f563, %f570;
	add.f32 	%f572, %f567, %f571;
	add.f32 	%f573, %f568, %f572;
	sub.f32 	%f574, %f568, %f573;
	add.f32 	%f575, %f572, %f574;
	mov.f32 	%f576, 0f3EE8BA2E;
	mul.rn.f32 	%f577, %f576, %f573;
	neg.f32 	%f578, %f577;
	fma.rn.f32 	%f579, %f576, %f573, %f578;
	fma.rn.f32 	%f580, %f576, %f575, %f579;
	mov.f32 	%f581, 0f00000000;
	fma.rn.f32 	%f582, %f581, %f573, %f580;
	add.rn.f32 	%f583, %f577, %f582;
	neg.f32 	%f584, %f583;
	add.rn.f32 	%f585, %f577, %f584;
	add.rn.f32 	%f586, %f585, %f582;
	mov.b32 	 %r261, %f583;
	setp.eq.s32	%p73, %r261, 1118925336;
	add.s32 	%r262, %r261, -1;
	mov.b32 	 %f587, %r262;
	add.f32 	%f588, %f586, 0f37000000;
	selp.f32	%f589, %f587, %f583, %p73;
	selp.f32	%f165, %f588, %f586, %p73;
	mul.f32 	%f590, %f589, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f591, %f590;
	mov.f32 	%f592, 0fBF317200;
	fma.rn.f32 	%f593, %f591, %f592, %f589;
	mov.f32 	%f594, 0fB5BFBE8E;
	fma.rn.f32 	%f595, %f591, %f594, %f593;
	mul.f32 	%f596, %f595, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f597, %f596;
	add.f32 	%f598, %f591, 0f00000000;
	ex2.approx.f32 	%f599, %f598;
	mul.f32 	%f600, %f597, %f599;
	setp.lt.f32	%p74, %f589, 0fC2D20000;
	selp.f32	%f601, 0f00000000, %f600, %p74;
	setp.gt.f32	%p75, %f589, 0f42D20000;
	selp.f32	%f1022, 0f7F800000, %f601, %p75;
	setp.eq.f32	%p76, %f1022, 0f7F800000;
	@%p76 bra 	BB0_80;

	fma.rn.f32 	%f1022, %f1022, %f165, %f1022;

BB0_80:
	setp.lt.f32	%p77, %f1021, 0f00000000;
	setp.eq.f32	%p78, %f163, 0f3F800000;
	and.pred  	%p3, %p77, %p78;
	mov.b32 	 %r263, %f1022;
	xor.b32  	%r264, %r263, -2147483648;
	mov.b32 	 %f602, %r264;
	selp.f32	%f1024, %f602, %f1022, %p3;
	setp.eq.f32	%p79, %f1021, 0f00000000;
	@%p79 bra 	BB0_83;
	bra.uni 	BB0_81;

BB0_83:
	add.f32 	%f605, %f1021, %f1021;
	selp.f32	%f1024, %f605, 0f00000000, %p78;
	bra.uni 	BB0_84;

BB0_148:
	mov.u64 	%rd220, image_HDR;
	cvta.global.u64 	%rd215, %rd220;
	mov.u32 	%r350, 8;
	mov.u64 	%rd219, 0;
	// inline asm
	call (%rd214), _rt_buffer_get_64, (%rd215, %r101, %r350, %rd19, %rd20, %rd219, %rd219);
	// inline asm
	mov.f32 	%f918, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs98, %f918;}

	// inline asm
	mov.u16 	%rs99, 0;
	st.v4.u16 	[%rd214], {%rs98, %rs98, %rs98, %rs99};

BB0_149:
	ld.global.u32 	%r351, [additive];
	setp.eq.s32	%p146, %r351, 0;
	@%p146 bra 	BB0_151;

	mov.u64 	%rd233, image_RNM0;
	cvta.global.u64 	%rd222, %rd233;
	mov.u32 	%r355, 8;
	mov.u64 	%rd232, 0;
	// inline asm
	call (%rd221), _rt_buffer_get_64, (%rd222, %r101, %r355, %rd19, %rd20, %rd232, %rd232);
	// inline asm
	ld.v4.u16 	{%rs106, %rs107, %rs108, %rs109}, [%rd221];
	// inline asm
	{  cvt.f32.f16 %f919, %rs106;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f920, %rs107;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f921, %rs108;}

	// inline asm
	// inline asm
	call (%rd227), _rt_buffer_get_64, (%rd222, %r101, %r355, %rd19, %rd20, %rd232, %rd232);
	// inline asm
	add.f32 	%f922, %f919, 0f00000000;
	add.f32 	%f923, %f920, 0f00000000;
	add.f32 	%f924, %f921, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs105, %f924;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs104, %f923;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs103, %f922;}

	// inline asm
	mov.u16 	%rs110, 0;
	st.v4.u16 	[%rd227], {%rs103, %rs104, %rs105, %rs110};
	bra.uni 	BB0_152;

BB0_151:
	mov.u64 	%rd240, image_RNM0;
	cvta.global.u64 	%rd235, %rd240;
	mov.u32 	%r357, 8;
	mov.u64 	%rd239, 0;
	// inline asm
	call (%rd234), _rt_buffer_get_64, (%rd235, %r101, %r357, %rd19, %rd20, %rd239, %rd239);
	// inline asm
	mov.f32 	%f925, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs111, %f925;}

	// inline asm
	mov.u16 	%rs112, 0;
	st.v4.u16 	[%rd234], {%rs111, %rs111, %rs111, %rs112};

BB0_152:
	ld.global.u32 	%r358, [additive];
	setp.eq.s32	%p147, %r358, 0;
	@%p147 bra 	BB0_154;

	mov.u64 	%rd253, image_RNM1;
	cvta.global.u64 	%rd242, %rd253;
	mov.u32 	%r362, 8;
	mov.u64 	%rd252, 0;
	// inline asm
	call (%rd241), _rt_buffer_get_64, (%rd242, %r101, %r362, %rd19, %rd20, %rd252, %rd252);
	// inline asm
	ld.v4.u16 	{%rs119, %rs120, %rs121, %rs122}, [%rd241];
	// inline asm
	{  cvt.f32.f16 %f926, %rs119;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f927, %rs120;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f928, %rs121;}

	// inline asm
	// inline asm
	call (%rd247), _rt_buffer_get_64, (%rd242, %r101, %r362, %rd19, %rd20, %rd252, %rd252);
	// inline asm
	add.f32 	%f929, %f926, 0f00000000;
	add.f32 	%f930, %f927, 0f00000000;
	add.f32 	%f931, %f928, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs118, %f931;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs117, %f930;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs116, %f929;}

	// inline asm
	mov.u16 	%rs123, 0;
	st.v4.u16 	[%rd247], {%rs116, %rs117, %rs118, %rs123};
	bra.uni 	BB0_155;

BB0_154:
	mov.u64 	%rd260, image_RNM1;
	cvta.global.u64 	%rd255, %rd260;
	mov.u32 	%r364, 8;
	mov.u64 	%rd259, 0;
	// inline asm
	call (%rd254), _rt_buffer_get_64, (%rd255, %r101, %r364, %rd19, %rd20, %rd259, %rd259);
	// inline asm
	mov.f32 	%f932, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs124, %f932;}

	// inline asm
	mov.u16 	%rs125, 0;
	st.v4.u16 	[%rd254], {%rs124, %rs124, %rs124, %rs125};

BB0_155:
	ld.global.u32 	%r365, [additive];
	setp.eq.s32	%p148, %r365, 0;
	@%p148 bra 	BB0_157;

	mov.u64 	%rd273, image_RNM2;
	cvta.global.u64 	%rd262, %rd273;
	mov.u32 	%r369, 8;
	mov.u64 	%rd272, 0;
	// inline asm
	call (%rd261), _rt_buffer_get_64, (%rd262, %r101, %r369, %rd19, %rd20, %rd272, %rd272);
	// inline asm
	ld.v4.u16 	{%rs132, %rs133, %rs134, %rs135}, [%rd261];
	// inline asm
	{  cvt.f32.f16 %f933, %rs132;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f934, %rs133;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f935, %rs134;}

	// inline asm
	// inline asm
	call (%rd267), _rt_buffer_get_64, (%rd262, %r101, %r369, %rd19, %rd20, %rd272, %rd272);
	// inline asm
	add.f32 	%f936, %f933, 0f00000000;
	add.f32 	%f937, %f934, 0f00000000;
	add.f32 	%f938, %f935, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs131, %f938;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs130, %f937;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs129, %f936;}

	// inline asm
	mov.u16 	%rs136, 0;
	st.v4.u16 	[%rd267], {%rs129, %rs130, %rs131, %rs136};
	bra.uni 	BB0_158;

BB0_157:
	mov.u64 	%rd280, image_RNM2;
	cvta.global.u64 	%rd275, %rd280;
	mov.u32 	%r371, 8;
	mov.u64 	%rd279, 0;
	// inline asm
	call (%rd274), _rt_buffer_get_64, (%rd275, %r101, %r371, %rd19, %rd20, %rd279, %rd279);
	// inline asm
	mov.f32 	%f939, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs137, %f939;}

	// inline asm
	mov.u16 	%rs138, 0;
	st.v4.u16 	[%rd274], {%rs137, %rs137, %rs137, %rs138};

BB0_158:
	ld.global.u32 	%r372, [additive];
	setp.eq.s32	%p149, %r372, 0;
	@%p149 bra 	BB0_160;

	mov.u64 	%rd293, image_RNM3;
	cvta.global.u64 	%rd282, %rd293;
	mov.u32 	%r376, 8;
	mov.u64 	%rd292, 0;
	// inline asm
	call (%rd281), _rt_buffer_get_64, (%rd282, %r101, %r376, %rd19, %rd20, %rd292, %rd292);
	// inline asm
	ld.v4.u16 	{%rs145, %rs146, %rs147, %rs148}, [%rd281];
	// inline asm
	{  cvt.f32.f16 %f940, %rs145;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f941, %rs146;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f942, %rs147;}

	// inline asm
	// inline asm
	call (%rd287), _rt_buffer_get_64, (%rd282, %r101, %r376, %rd19, %rd20, %rd292, %rd292);
	// inline asm
	add.f32 	%f943, %f940, 0f00000000;
	add.f32 	%f944, %f941, 0f00000000;
	add.f32 	%f945, %f942, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs144, %f945;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs143, %f944;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs142, %f943;}

	// inline asm
	mov.u16 	%rs149, 0;
	st.v4.u16 	[%rd287], {%rs142, %rs143, %rs144, %rs149};
	bra.uni 	BB0_161;

BB0_160:
	mov.u64 	%rd300, image_RNM3;
	cvta.global.u64 	%rd295, %rd300;
	mov.u32 	%r378, 8;
	mov.u64 	%rd299, 0;
	// inline asm
	call (%rd294), _rt_buffer_get_64, (%rd295, %r101, %r378, %rd19, %rd20, %rd299, %rd299);
	// inline asm
	mov.f32 	%f946, 0f00000000;
	// inline asm
	{  cvt.rn.f16.f32 %rs150, %f946;}

	// inline asm
	mov.u16 	%rs151, 0;
	st.v4.u16 	[%rd294], {%rs150, %rs150, %rs150, %rs151};
	bra.uni 	BB0_161;

BB0_81:
	setp.geu.f32	%p80, %f1021, 0f00000000;
	@%p80 bra 	BB0_84;

	cvt.rzi.f32.f32	%f604, %f576;
	setp.neu.f32	%p81, %f604, 0f3EE8BA2E;
	selp.f32	%f1024, 0f7FFFFFFF, %f1024, %p81;

BB0_84:
	add.f32 	%f606, %f164, 0f3EE8BA2E;
	mov.b32 	 %r265, %f606;
	setp.lt.s32	%p83, %r265, 2139095040;
	@%p83 bra 	BB0_89;

	setp.gtu.f32	%p84, %f164, 0f7F800000;
	@%p84 bra 	BB0_88;
	bra.uni 	BB0_86;

BB0_88:
	add.f32 	%f1024, %f1021, 0f3EE8BA2E;
	bra.uni 	BB0_89;

BB0_86:
	setp.neu.f32	%p85, %f164, 0f7F800000;
	@%p85 bra 	BB0_89;

	selp.f32	%f1024, 0fFF800000, 0f7F800000, %p3;

BB0_89:
	mul.f32 	%f607, %f1024, 0f437F0000;
	setp.eq.f32	%p86, %f1021, 0f3F800000;
	selp.f32	%f608, 0f437F0000, %f607, %p86;
	cvt.rzi.u32.f32	%r266, %f608;
	cvt.u16.u32	%rs14, %r266;
	mov.u16 	%rs15, 255;
	st.v2.u8 	[%rd73], {%rs14, %rs15};
	ld.global.u32 	%r412, [imageEnabled];

BB0_90:
	ld.global.f32 	%f609, [lightColor];
	mul.f32 	%f176, %f1016, %f609;
	ld.global.f32 	%f610, [lightColor+4];
	mul.f32 	%f177, %f1016, %f610;
	ld.global.f32 	%f611, [lightColor+8];
	mul.f32 	%f178, %f1016, %f611;
	and.b32  	%r267, %r412, 1;
	setp.eq.b32	%p87, %r267, 1;
	@!%p87 bra 	BB0_125;
	bra.uni 	BB0_91;

BB0_91:
	mov.f32 	%f614, 0f3E666666;
	cvt.rzi.f32.f32	%f615, %f614;
	fma.rn.f32 	%f616, %f615, 0fC0000000, 0f3EE66666;
	abs.f32 	%f179, %f616;
	abs.f32 	%f180, %f176;
	setp.lt.f32	%p88, %f180, 0f00800000;
	mul.f32 	%f617, %f180, 0f4B800000;
	selp.f32	%f618, 0fC3170000, 0fC2FE0000, %p88;
	selp.f32	%f619, %f617, %f180, %p88;
	mov.b32 	 %r268, %f619;
	and.b32  	%r269, %r268, 8388607;
	or.b32  	%r270, %r269, 1065353216;
	mov.b32 	 %f620, %r270;
	shr.u32 	%r271, %r268, 23;
	cvt.rn.f32.u32	%f621, %r271;
	add.f32 	%f622, %f618, %f621;
	setp.gt.f32	%p89, %f620, 0f3FB504F3;
	mul.f32 	%f623, %f620, 0f3F000000;
	add.f32 	%f624, %f622, 0f3F800000;
	selp.f32	%f625, %f623, %f620, %p89;
	selp.f32	%f626, %f624, %f622, %p89;
	add.f32 	%f627, %f625, 0fBF800000;
	add.f32 	%f613, %f625, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f612,%f613;
	// inline asm
	add.f32 	%f628, %f627, %f627;
	mul.f32 	%f629, %f612, %f628;
	mul.f32 	%f630, %f629, %f629;
	mov.f32 	%f631, 0f3C4CAF63;
	mov.f32 	%f632, 0f3B18F0FE;
	fma.rn.f32 	%f633, %f632, %f630, %f631;
	mov.f32 	%f634, 0f3DAAAABD;
	fma.rn.f32 	%f635, %f633, %f630, %f634;
	mul.rn.f32 	%f636, %f635, %f630;
	mul.rn.f32 	%f637, %f636, %f629;
	sub.f32 	%f638, %f627, %f629;
	neg.f32 	%f639, %f629;
	add.f32 	%f640, %f638, %f638;
	fma.rn.f32 	%f641, %f639, %f627, %f640;
	mul.rn.f32 	%f642, %f612, %f641;
	add.f32 	%f643, %f637, %f629;
	sub.f32 	%f644, %f629, %f643;
	add.f32 	%f645, %f637, %f644;
	add.f32 	%f646, %f642, %f645;
	add.f32 	%f647, %f643, %f646;
	sub.f32 	%f648, %f643, %f647;
	add.f32 	%f649, %f646, %f648;
	mov.f32 	%f650, 0f3F317200;
	mul.rn.f32 	%f651, %f626, %f650;
	mov.f32 	%f652, 0f35BFBE8E;
	mul.rn.f32 	%f653, %f626, %f652;
	add.f32 	%f654, %f651, %f647;
	sub.f32 	%f655, %f651, %f654;
	add.f32 	%f656, %f647, %f655;
	add.f32 	%f657, %f649, %f656;
	add.f32 	%f658, %f653, %f657;
	add.f32 	%f659, %f654, %f658;
	sub.f32 	%f660, %f654, %f659;
	add.f32 	%f661, %f658, %f660;
	mov.f32 	%f662, 0f3EE66666;
	mul.rn.f32 	%f663, %f662, %f659;
	neg.f32 	%f664, %f663;
	fma.rn.f32 	%f665, %f662, %f659, %f664;
	fma.rn.f32 	%f666, %f662, %f661, %f665;
	mov.f32 	%f667, 0f00000000;
	fma.rn.f32 	%f668, %f667, %f659, %f666;
	add.rn.f32 	%f669, %f663, %f668;
	neg.f32 	%f670, %f669;
	add.rn.f32 	%f671, %f663, %f670;
	add.rn.f32 	%f672, %f671, %f668;
	mov.b32 	 %r272, %f669;
	setp.eq.s32	%p90, %r272, 1118925336;
	add.s32 	%r273, %r272, -1;
	mov.b32 	 %f673, %r273;
	add.f32 	%f674, %f672, 0f37000000;
	selp.f32	%f675, %f673, %f669, %p90;
	selp.f32	%f181, %f674, %f672, %p90;
	mul.f32 	%f676, %f675, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f677, %f676;
	mov.f32 	%f678, 0fBF317200;
	fma.rn.f32 	%f679, %f677, %f678, %f675;
	mov.f32 	%f680, 0fB5BFBE8E;
	fma.rn.f32 	%f681, %f677, %f680, %f679;
	mul.f32 	%f682, %f681, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f683, %f682;
	add.f32 	%f684, %f677, 0f00000000;
	ex2.approx.f32 	%f685, %f684;
	mul.f32 	%f686, %f683, %f685;
	setp.lt.f32	%p91, %f675, 0fC2D20000;
	selp.f32	%f687, 0f00000000, %f686, %p91;
	setp.gt.f32	%p92, %f675, 0f42D20000;
	selp.f32	%f1025, 0f7F800000, %f687, %p92;
	setp.eq.f32	%p93, %f1025, 0f7F800000;
	@%p93 bra 	BB0_93;

	fma.rn.f32 	%f1025, %f1025, %f181, %f1025;

BB0_93:
	setp.lt.f32	%p94, %f176, 0f00000000;
	setp.eq.f32	%p95, %f179, 0f3F800000;
	and.pred  	%p4, %p94, %p95;
	mov.b32 	 %r274, %f1025;
	xor.b32  	%r275, %r274, -2147483648;
	mov.b32 	 %f688, %r275;
	selp.f32	%f1027, %f688, %f1025, %p4;
	setp.eq.f32	%p96, %f176, 0f00000000;
	@%p96 bra 	BB0_96;
	bra.uni 	BB0_94;

BB0_96:
	add.f32 	%f691, %f176, %f176;
	selp.f32	%f1027, %f691, 0f00000000, %p95;
	bra.uni 	BB0_97;

BB0_94:
	setp.geu.f32	%p97, %f176, 0f00000000;
	@%p97 bra 	BB0_97;

	cvt.rzi.f32.f32	%f690, %f662;
	setp.neu.f32	%p98, %f690, 0f3EE66666;
	selp.f32	%f1027, 0f7FFFFFFF, %f1027, %p98;

BB0_97:
	add.f32 	%f692, %f180, 0f3EE66666;
	mov.b32 	 %r276, %f692;
	setp.lt.s32	%p100, %r276, 2139095040;
	@%p100 bra 	BB0_102;

	setp.gtu.f32	%p101, %f180, 0f7F800000;
	@%p101 bra 	BB0_101;
	bra.uni 	BB0_99;

BB0_101:
	add.f32 	%f1027, %f176, 0f3EE66666;
	bra.uni 	BB0_102;

BB0_99:
	setp.neu.f32	%p102, %f180, 0f7F800000;
	@%p102 bra 	BB0_102;

	selp.f32	%f1027, 0fFF800000, 0f7F800000, %p4;

BB0_102:
	setp.eq.f32	%p103, %f176, 0f3F800000;
	selp.f32	%f192, 0f3F800000, %f1027, %p103;
	abs.f32 	%f193, %f177;
	setp.lt.f32	%p104, %f193, 0f00800000;
	mul.f32 	%f695, %f193, 0f4B800000;
	selp.f32	%f696, 0fC3170000, 0fC2FE0000, %p104;
	selp.f32	%f697, %f695, %f193, %p104;
	mov.b32 	 %r277, %f697;
	and.b32  	%r278, %r277, 8388607;
	or.b32  	%r279, %r278, 1065353216;
	mov.b32 	 %f698, %r279;
	shr.u32 	%r280, %r277, 23;
	cvt.rn.f32.u32	%f699, %r280;
	add.f32 	%f700, %f696, %f699;
	setp.gt.f32	%p105, %f698, 0f3FB504F3;
	mul.f32 	%f701, %f698, 0f3F000000;
	add.f32 	%f702, %f700, 0f3F800000;
	selp.f32	%f703, %f701, %f698, %p105;
	selp.f32	%f704, %f702, %f700, %p105;
	add.f32 	%f705, %f703, 0fBF800000;
	add.f32 	%f694, %f703, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f693,%f694;
	// inline asm
	add.f32 	%f706, %f705, %f705;
	mul.f32 	%f707, %f693, %f706;
	mul.f32 	%f708, %f707, %f707;
	fma.rn.f32 	%f711, %f632, %f708, %f631;
	fma.rn.f32 	%f713, %f711, %f708, %f634;
	mul.rn.f32 	%f714, %f713, %f708;
	mul.rn.f32 	%f715, %f714, %f707;
	sub.f32 	%f716, %f705, %f707;
	neg.f32 	%f717, %f707;
	add.f32 	%f718, %f716, %f716;
	fma.rn.f32 	%f719, %f717, %f705, %f718;
	mul.rn.f32 	%f720, %f693, %f719;
	add.f32 	%f721, %f715, %f707;
	sub.f32 	%f722, %f707, %f721;
	add.f32 	%f723, %f715, %f722;
	add.f32 	%f724, %f720, %f723;
	add.f32 	%f725, %f721, %f724;
	sub.f32 	%f726, %f721, %f725;
	add.f32 	%f727, %f724, %f726;
	mul.rn.f32 	%f729, %f704, %f650;
	mul.rn.f32 	%f731, %f704, %f652;
	add.f32 	%f732, %f729, %f725;
	sub.f32 	%f733, %f729, %f732;
	add.f32 	%f734, %f725, %f733;
	add.f32 	%f735, %f727, %f734;
	add.f32 	%f736, %f731, %f735;
	add.f32 	%f737, %f732, %f736;
	sub.f32 	%f738, %f732, %f737;
	add.f32 	%f739, %f736, %f738;
	mul.rn.f32 	%f741, %f662, %f737;
	neg.f32 	%f742, %f741;
	fma.rn.f32 	%f743, %f662, %f737, %f742;
	fma.rn.f32 	%f744, %f662, %f739, %f743;
	fma.rn.f32 	%f746, %f667, %f737, %f744;
	add.rn.f32 	%f747, %f741, %f746;
	neg.f32 	%f748, %f747;
	add.rn.f32 	%f749, %f741, %f748;
	add.rn.f32 	%f750, %f749, %f746;
	mov.b32 	 %r281, %f747;
	setp.eq.s32	%p106, %r281, 1118925336;
	add.s32 	%r282, %r281, -1;
	mov.b32 	 %f751, %r282;
	add.f32 	%f752, %f750, 0f37000000;
	selp.f32	%f753, %f751, %f747, %p106;
	selp.f32	%f194, %f752, %f750, %p106;
	mul.f32 	%f754, %f753, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f755, %f754;
	fma.rn.f32 	%f757, %f755, %f678, %f753;
	fma.rn.f32 	%f759, %f755, %f680, %f757;
	mul.f32 	%f760, %f759, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f761, %f760;
	add.f32 	%f762, %f755, 0f00000000;
	ex2.approx.f32 	%f763, %f762;
	mul.f32 	%f764, %f761, %f763;
	setp.lt.f32	%p107, %f753, 0fC2D20000;
	selp.f32	%f765, 0f00000000, %f764, %p107;
	setp.gt.f32	%p108, %f753, 0f42D20000;
	selp.f32	%f1028, 0f7F800000, %f765, %p108;
	setp.eq.f32	%p109, %f1028, 0f7F800000;
	@%p109 bra 	BB0_104;

	fma.rn.f32 	%f1028, %f1028, %f194, %f1028;

BB0_104:
	setp.lt.f32	%p110, %f177, 0f00000000;
	and.pred  	%p5, %p110, %p95;
	mov.b32 	 %r283, %f1028;
	xor.b32  	%r284, %r283, -2147483648;
	mov.b32 	 %f766, %r284;
	selp.f32	%f1030, %f766, %f1028, %p5;
	setp.eq.f32	%p112, %f177, 0f00000000;
	@%p112 bra 	BB0_107;
	bra.uni 	BB0_105;

BB0_107:
	add.f32 	%f769, %f177, %f177;
	selp.f32	%f1030, %f769, 0f00000000, %p95;
	bra.uni 	BB0_108;

BB0_105:
	setp.geu.f32	%p113, %f177, 0f00000000;
	@%p113 bra 	BB0_108;

	cvt.rzi.f32.f32	%f768, %f662;
	setp.neu.f32	%p114, %f768, 0f3EE66666;
	selp.f32	%f1030, 0f7FFFFFFF, %f1030, %p114;

BB0_108:
	add.f32 	%f770, %f193, 0f3EE66666;
	mov.b32 	 %r285, %f770;
	setp.lt.s32	%p116, %r285, 2139095040;
	@%p116 bra 	BB0_113;

	setp.gtu.f32	%p117, %f193, 0f7F800000;
	@%p117 bra 	BB0_112;
	bra.uni 	BB0_110;

BB0_112:
	add.f32 	%f1030, %f177, 0f3EE66666;
	bra.uni 	BB0_113;

BB0_110:
	setp.neu.f32	%p118, %f193, 0f7F800000;
	@%p118 bra 	BB0_113;

	selp.f32	%f1030, 0fFF800000, 0f7F800000, %p5;

BB0_113:
	setp.eq.f32	%p119, %f177, 0f3F800000;
	selp.f32	%f205, 0f3F800000, %f1030, %p119;
	abs.f32 	%f206, %f178;
	setp.lt.f32	%p120, %f206, 0f00800000;
	mul.f32 	%f773, %f206, 0f4B800000;
	selp.f32	%f774, 0fC3170000, 0fC2FE0000, %p120;
	selp.f32	%f775, %f773, %f206, %p120;
	mov.b32 	 %r286, %f775;
	and.b32  	%r287, %r286, 8388607;
	or.b32  	%r288, %r287, 1065353216;
	mov.b32 	 %f776, %r288;
	shr.u32 	%r289, %r286, 23;
	cvt.rn.f32.u32	%f777, %r289;
	add.f32 	%f778, %f774, %f777;
	setp.gt.f32	%p121, %f776, 0f3FB504F3;
	mul.f32 	%f779, %f776, 0f3F000000;
	add.f32 	%f780, %f778, 0f3F800000;
	selp.f32	%f781, %f779, %f776, %p121;
	selp.f32	%f782, %f780, %f778, %p121;
	add.f32 	%f783, %f781, 0fBF800000;
	add.f32 	%f772, %f781, 0f3F800000;
	// inline asm
	rcp.approx.ftz.f32 %f771,%f772;
	// inline asm
	add.f32 	%f784, %f783, %f783;
	mul.f32 	%f785, %f771, %f784;
	mul.f32 	%f786, %f785, %f785;
	fma.rn.f32 	%f789, %f632, %f786, %f631;
	fma.rn.f32 	%f791, %f789, %f786, %f634;
	mul.rn.f32 	%f792, %f791, %f786;
	mul.rn.f32 	%f793, %f792, %f785;
	sub.f32 	%f794, %f783, %f785;
	neg.f32 	%f795, %f785;
	add.f32 	%f796, %f794, %f794;
	fma.rn.f32 	%f797, %f795, %f783, %f796;
	mul.rn.f32 	%f798, %f771, %f797;
	add.f32 	%f799, %f793, %f785;
	sub.f32 	%f800, %f785, %f799;
	add.f32 	%f801, %f793, %f800;
	add.f32 	%f802, %f798, %f801;
	add.f32 	%f803, %f799, %f802;
	sub.f32 	%f804, %f799, %f803;
	add.f32 	%f805, %f802, %f804;
	mul.rn.f32 	%f807, %f782, %f650;
	mul.rn.f32 	%f809, %f782, %f652;
	add.f32 	%f810, %f807, %f803;
	sub.f32 	%f811, %f807, %f810;
	add.f32 	%f812, %f803, %f811;
	add.f32 	%f813, %f805, %f812;
	add.f32 	%f814, %f809, %f813;
	add.f32 	%f815, %f810, %f814;
	sub.f32 	%f816, %f810, %f815;
	add.f32 	%f817, %f814, %f816;
	mul.rn.f32 	%f819, %f662, %f815;
	neg.f32 	%f820, %f819;
	fma.rn.f32 	%f821, %f662, %f815, %f820;
	fma.rn.f32 	%f822, %f662, %f817, %f821;
	fma.rn.f32 	%f824, %f667, %f815, %f822;
	add.rn.f32 	%f825, %f819, %f824;
	neg.f32 	%f826, %f825;
	add.rn.f32 	%f827, %f819, %f826;
	add.rn.f32 	%f828, %f827, %f824;
	mov.b32 	 %r290, %f825;
	setp.eq.s32	%p122, %r290, 1118925336;
	add.s32 	%r291, %r290, -1;
	mov.b32 	 %f829, %r291;
	add.f32 	%f830, %f828, 0f37000000;
	selp.f32	%f831, %f829, %f825, %p122;
	selp.f32	%f207, %f830, %f828, %p122;
	mul.f32 	%f832, %f831, 0f3FB8AA3B;
	cvt.rzi.f32.f32	%f833, %f832;
	fma.rn.f32 	%f835, %f833, %f678, %f831;
	fma.rn.f32 	%f837, %f833, %f680, %f835;
	mul.f32 	%f838, %f837, 0f3FB8AA3B;
	ex2.approx.ftz.f32 	%f839, %f838;
	add.f32 	%f840, %f833, 0f00000000;
	ex2.approx.f32 	%f841, %f840;
	mul.f32 	%f842, %f839, %f841;
	setp.lt.f32	%p123, %f831, 0fC2D20000;
	selp.f32	%f843, 0f00000000, %f842, %p123;
	setp.gt.f32	%p124, %f831, 0f42D20000;
	selp.f32	%f1031, 0f7F800000, %f843, %p124;
	setp.eq.f32	%p125, %f1031, 0f7F800000;
	@%p125 bra 	BB0_115;

	fma.rn.f32 	%f1031, %f1031, %f207, %f1031;

BB0_115:
	setp.lt.f32	%p126, %f178, 0f00000000;
	and.pred  	%p6, %p126, %p95;
	mov.b32 	 %r292, %f1031;
	xor.b32  	%r293, %r292, -2147483648;
	mov.b32 	 %f844, %r293;
	selp.f32	%f1033, %f844, %f1031, %p6;
	setp.eq.f32	%p128, %f178, 0f00000000;
	@%p128 bra 	BB0_118;
	bra.uni 	BB0_116;

BB0_118:
	add.f32 	%f847, %f178, %f178;
	selp.f32	%f1033, %f847, 0f00000000, %p95;
	bra.uni 	BB0_119;

BB0_116:
	setp.geu.f32	%p129, %f178, 0f00000000;
	@%p129 bra 	BB0_119;

	cvt.rzi.f32.f32	%f846, %f662;
	setp.neu.f32	%p130, %f846, 0f3EE66666;
	selp.f32	%f1033, 0f7FFFFFFF, %f1033, %p130;

BB0_119:
	add.f32 	%f848, %f206, 0f3EE66666;
	mov.b32 	 %r294, %f848;
	setp.lt.s32	%p132, %r294, 2139095040;
	@%p132 bra 	BB0_124;

	setp.gtu.f32	%p133, %f206, 0f7F800000;
	@%p133 bra 	BB0_123;
	bra.uni 	BB0_121;

BB0_123:
	add.f32 	%f1033, %f178, 0f3EE66666;
	bra.uni 	BB0_124;

BB0_121:
	setp.neu.f32	%p134, %f206, 0f7F800000;
	@%p134 bra 	BB0_124;

	selp.f32	%f1033, 0fFF800000, 0f7F800000, %p6;

BB0_124:
	setp.eq.f32	%p135, %f178, 0f3F800000;
	selp.f32	%f849, 0f3F800000, %f1033, %p135;
	cvt.u64.u32	%rd83, %r4;
	cvt.u64.u32	%rd82, %r3;
	mov.u64 	%rd86, image;
	cvta.global.u64 	%rd81, %rd86;
	// inline asm
	call (%rd80), _rt_buffer_get_64, (%rd81, %r101, %r102, %rd82, %rd83, %rd26, %rd26);
	// inline asm
	cvt.sat.f32.f32	%f850, %f849;
	mul.f32 	%f851, %f850, 0f437FFD71;
	cvt.rzi.u32.f32	%r297, %f851;
	cvt.sat.f32.f32	%f852, %f205;
	mul.f32 	%f853, %f852, 0f437FFD71;
	cvt.rzi.u32.f32	%r298, %f853;
	cvt.sat.f32.f32	%f854, %f192;
	mul.f32 	%f855, %f854, 0f437FFD71;
	cvt.rzi.u32.f32	%r299, %f855;
	cvt.u16.u32	%rs16, %r297;
	cvt.u16.u32	%rs17, %r299;
	cvt.u16.u32	%rs18, %r298;
	mov.u16 	%rs19, 255;
	st.v4.u8 	[%rd80], {%rs16, %rs18, %rs17, %rs19};
	ld.global.u32 	%r412, [imageEnabled];

BB0_125:
	cvt.u64.u32	%rd17, %r3;
	cvt.u64.u32	%rd18, %r4;
	and.b32  	%r300, %r412, 4;
	setp.eq.s32	%p136, %r300, 0;
	@%p136 bra 	BB0_129;

	ld.global.u32 	%r301, [additive];
	setp.eq.s32	%p137, %r301, 0;
	// inline asm
	{  cvt.rn.f16.f32 %rs20, %f407;}

	// inline asm
	@%p137 bra 	BB0_128;

	mov.u64 	%rd99, image_HDR;
	cvta.global.u64 	%rd88, %rd99;
	mov.u32 	%r305, 8;
	// inline asm
	call (%rd87), _rt_buffer_get_64, (%rd88, %r101, %r305, %rd17, %rd18, %rd26, %rd26);
	// inline asm
	ld.v4.u16 	{%rs27, %rs28, %rs29, %rs30}, [%rd87];
	// inline asm
	{  cvt.f32.f16 %f857, %rs27;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f858, %rs28;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f859, %rs29;}

	// inline asm
	// inline asm
	call (%rd93), _rt_buffer_get_64, (%rd88, %r101, %r305, %rd17, %rd18, %rd26, %rd26);
	// inline asm
	add.f32 	%f860, %f176, %f857;
	add.f32 	%f861, %f177, %f858;
	add.f32 	%f862, %f178, %f859;
	// inline asm
	{  cvt.rn.f16.f32 %rs26, %f862;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs25, %f861;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs24, %f860;}

	// inline asm
	st.v4.u16 	[%rd93], {%rs24, %rs25, %rs26, %rs20};
	bra.uni 	BB0_129;

BB0_128:
	mov.u64 	%rd106, image_HDR;
	cvta.global.u64 	%rd101, %rd106;
	mov.u32 	%r307, 8;
	// inline asm
	call (%rd100), _rt_buffer_get_64, (%rd101, %r101, %r307, %rd17, %rd18, %rd26, %rd26);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs33, %f178;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs32, %f177;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs31, %f176;}

	// inline asm
	st.v4.u16 	[%rd100], {%rs31, %rs32, %rs33, %rs20};

BB0_129:
	selp.f32	%f867, 0f3F000000, 0f3E800000, %p150;
	mul.f32 	%f218, %f867, %f1017;
	mul.f32 	%f219, %f867, %f1018;
	mul.f32 	%f220, %f867, %f1019;
	mul.f32 	%f221, %f867, %f1020;
	ld.global.f32 	%f868, [lightColor];
	mul.f32 	%f222, %f218, %f868;
	ld.global.f32 	%f869, [lightColor+4];
	mul.f32 	%f223, %f218, %f869;
	ld.global.f32 	%f870, [lightColor+8];
	mul.f32 	%f224, %f218, %f870;
	ld.global.u32 	%r308, [additive];
	setp.eq.s32	%p138, %r308, 0;
	// inline asm
	{  cvt.rn.f16.f32 %rs34, %f407;}

	// inline asm
	@%p138 bra 	BB0_131;

	mov.u64 	%rd119, image_RNM0;
	cvta.global.u64 	%rd108, %rd119;
	mov.u32 	%r312, 8;
	// inline asm
	call (%rd107), _rt_buffer_get_64, (%rd108, %r101, %r312, %rd17, %rd18, %rd26, %rd26);
	// inline asm
	ld.v4.u16 	{%rs41, %rs42, %rs43, %rs44}, [%rd107];
	// inline asm
	{  cvt.f32.f16 %f871, %rs41;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f872, %rs42;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f873, %rs43;}

	// inline asm
	// inline asm
	call (%rd113), _rt_buffer_get_64, (%rd108, %r101, %r312, %rd17, %rd18, %rd26, %rd26);
	// inline asm
	add.f32 	%f874, %f222, %f871;
	add.f32 	%f875, %f223, %f872;
	add.f32 	%f876, %f224, %f873;
	// inline asm
	{  cvt.rn.f16.f32 %rs40, %f876;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs39, %f875;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs38, %f874;}

	// inline asm
	st.v4.u16 	[%rd113], {%rs38, %rs39, %rs40, %rs34};
	bra.uni 	BB0_132;

BB0_131:
	mov.u64 	%rd126, image_RNM0;
	cvta.global.u64 	%rd121, %rd126;
	mov.u32 	%r314, 8;
	// inline asm
	call (%rd120), _rt_buffer_get_64, (%rd121, %r101, %r314, %rd17, %rd18, %rd26, %rd26);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs47, %f224;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs46, %f223;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs45, %f222;}

	// inline asm
	st.v4.u16 	[%rd120], {%rs45, %rs46, %rs47, %rs34};

BB0_132:
	mov.f32 	%f881, 0f34000000;
	max.f32 	%f882, %f218, %f881;
	div.rn.f32 	%f883, %f219, %f882;
	fma.rn.f32 	%f225, %f883, 0f3F000000, 0f3F000000;
	div.rn.f32 	%f884, %f220, %f882;
	fma.rn.f32 	%f226, %f884, 0f3F000000, 0f3F000000;
	div.rn.f32 	%f885, %f221, %f882;
	fma.rn.f32 	%f227, %f885, 0f3F000000, 0f3F000000;
	ld.global.u32 	%r315, [additive];
	setp.eq.s32	%p139, %r315, 0;
	// inline asm
	{  cvt.rn.f16.f32 %rs48, %f407;}

	// inline asm
	@%p139 bra 	BB0_134;

	mov.u64 	%rd139, image_RNM1;
	cvta.global.u64 	%rd128, %rd139;
	mov.u32 	%r319, 8;
	// inline asm
	call (%rd127), _rt_buffer_get_64, (%rd128, %r101, %r319, %rd17, %rd18, %rd26, %rd26);
	// inline asm
	ld.v4.u16 	{%rs55, %rs56, %rs57, %rs58}, [%rd127];
	// inline asm
	{  cvt.f32.f16 %f886, %rs55;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f887, %rs56;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f888, %rs57;}

	// inline asm
	// inline asm
	call (%rd133), _rt_buffer_get_64, (%rd128, %r101, %r319, %rd17, %rd18, %rd26, %rd26);
	// inline asm
	add.f32 	%f889, %f225, %f886;
	add.f32 	%f890, %f225, %f887;
	add.f32 	%f891, %f225, %f888;
	// inline asm
	{  cvt.rn.f16.f32 %rs54, %f891;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs53, %f890;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs52, %f889;}

	// inline asm
	st.v4.u16 	[%rd133], {%rs52, %rs53, %rs54, %rs48};
	bra.uni 	BB0_135;

BB0_134:
	mov.u64 	%rd146, image_RNM1;
	cvta.global.u64 	%rd141, %rd146;
	mov.u32 	%r321, 8;
	// inline asm
	call (%rd140), _rt_buffer_get_64, (%rd141, %r101, %r321, %rd17, %rd18, %rd26, %rd26);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs59, %f225;}

	// inline asm
	st.v4.u16 	[%rd140], {%rs59, %rs59, %rs59, %rs48};

BB0_135:
	ld.global.u32 	%r322, [additive];
	setp.eq.s32	%p140, %r322, 0;
	// inline asm
	{  cvt.rn.f16.f32 %rs60, %f407;}

	// inline asm
	@%p140 bra 	BB0_137;

	mov.u64 	%rd159, image_RNM2;
	cvta.global.u64 	%rd148, %rd159;
	mov.u32 	%r326, 8;
	// inline asm
	call (%rd147), _rt_buffer_get_64, (%rd148, %r101, %r326, %rd17, %rd18, %rd26, %rd26);
	// inline asm
	ld.v4.u16 	{%rs67, %rs68, %rs69, %rs70}, [%rd147];
	// inline asm
	{  cvt.f32.f16 %f894, %rs67;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f895, %rs68;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f896, %rs69;}

	// inline asm
	// inline asm
	call (%rd153), _rt_buffer_get_64, (%rd148, %r101, %r326, %rd17, %rd18, %rd26, %rd26);
	// inline asm
	add.f32 	%f897, %f226, %f894;
	add.f32 	%f898, %f226, %f895;
	add.f32 	%f899, %f226, %f896;
	// inline asm
	{  cvt.rn.f16.f32 %rs66, %f899;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs65, %f898;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs64, %f897;}

	// inline asm
	st.v4.u16 	[%rd153], {%rs64, %rs65, %rs66, %rs60};
	bra.uni 	BB0_138;

BB0_137:
	mov.u64 	%rd166, image_RNM2;
	cvta.global.u64 	%rd161, %rd166;
	mov.u32 	%r328, 8;
	// inline asm
	call (%rd160), _rt_buffer_get_64, (%rd161, %r101, %r328, %rd17, %rd18, %rd26, %rd26);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs71, %f226;}

	// inline asm
	st.v4.u16 	[%rd160], {%rs71, %rs71, %rs71, %rs60};

BB0_138:
	ld.global.u32 	%r329, [additive];
	setp.eq.s32	%p141, %r329, 0;
	// inline asm
	{  cvt.rn.f16.f32 %rs72, %f407;}

	// inline asm
	@%p141 bra 	BB0_140;

	mov.u64 	%rd179, image_RNM3;
	cvta.global.u64 	%rd168, %rd179;
	mov.u32 	%r333, 8;
	// inline asm
	call (%rd167), _rt_buffer_get_64, (%rd168, %r101, %r333, %rd17, %rd18, %rd26, %rd26);
	// inline asm
	ld.v4.u16 	{%rs79, %rs80, %rs81, %rs82}, [%rd167];
	// inline asm
	{  cvt.f32.f16 %f902, %rs79;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f903, %rs80;}

	// inline asm
	// inline asm
	{  cvt.f32.f16 %f904, %rs81;}

	// inline asm
	// inline asm
	call (%rd173), _rt_buffer_get_64, (%rd168, %r101, %r333, %rd17, %rd18, %rd26, %rd26);
	// inline asm
	add.f32 	%f905, %f227, %f902;
	add.f32 	%f906, %f227, %f903;
	add.f32 	%f907, %f227, %f904;
	// inline asm
	{  cvt.rn.f16.f32 %rs78, %f907;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs77, %f906;}

	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs76, %f905;}

	// inline asm
	st.v4.u16 	[%rd173], {%rs76, %rs77, %rs78, %rs72};
	bra.uni 	BB0_161;

BB0_140:
	mov.u64 	%rd186, image_RNM3;
	cvta.global.u64 	%rd181, %rd186;
	mov.u32 	%r335, 8;
	// inline asm
	call (%rd180), _rt_buffer_get_64, (%rd181, %r101, %r335, %rd17, %rd18, %rd26, %rd26);
	// inline asm
	// inline asm
	{  cvt.rn.f16.f32 %rs83, %f227;}

	// inline asm
	st.v4.u16 	[%rd180], {%rs83, %rs83, %rs83, %rs72};

BB0_161:
	ret;
}